LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 34

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
4.4 Clock source selection multiplexer
UM10360
User manual
4.4.1 Clock Source Select register (CLKSRCSEL - 0x400F C10C)
Several clock sources may be chosen to drive PLL0 and ultimately the CPU and on-chip
peripheral devices. The clock sources available are the main oscillator, the RTC oscillator,
and the Internal RC oscillator.
The clock source selection can only be changed safely when PLL0 is not connected. For a
detailed description of how to change the clock source in a system using PLL0 see
Section 4.5.13 “PLL0 setup
Note the following restrictions regarding the choice of clock sources:
The CLKSRCSEL register contains the bits that select the clock source for PLL0.
Table 17.
Bit
1:0
31:2
•
•
Only the main oscillator must be used (via PLL0) as the clock source for the USB
subsystem. The IRC or RTC oscillators do not provide the proper tolerances for this
use.
The IRC oscillator should not be used (via PLL0) as the clock source for the CAN
controllers if the CAN baud rate is higher than 100 kbit/s.
Symbol
CLKSRC
-
Clock Source Select register (CLKSRCSEL - address 0x400F C10C) bit
description
All information provided in this document is subject to legal disclaimers.
Value Description
00
01
10
11
Warning: Improper setting of this value, or an incorrect sequence of
changing this value may result in incorrect operation of the device.
0
Rev. 2 — 19 August 2010
Selects the clock source for PLL0 as follows:
Selects the Internal RC oscillator as the PLL0 clock source
(default).
Selects the main oscillator as the PLL0 clock source.
Remark: Select the main oscillator as PLL0 clock source if the
PLL0 clock output is used for USB or for CAN with baudrates
> 100 kBit/s.
Selects the RTC oscillator as the PLL0 clock source.
Reserved, do not use this setting.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
sequence”.
Chapter 4: LPC17xx Clocking and power control
UM10360
© NXP B.V. 2010. All rights reserved.
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Reset
value
0
NA