LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 639

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 604. FMSW2 register bit description (FMSW2, address: 0x4008 4034)
Table 605. FMSW3 register bit description (FMSW3, address: 0x4008 4038)
Table 606. Flash module Status register (FMSTAT - 0x4008 4FE0) bit description
Table 607. Flash Module Status Clear register (FMSTATCLR - 0x0x4008 4FE8) bit description
UM10360
User manual
Bit
31:0
Bit
31:0
Bit
31:2
2
1:0
Bit
31:2
2
1:0
Symbol
SW2[95:64]
Symbol
SW3[127:96]
Symbol
-
SIG_DONE
-
Symbol
-
SIG_DONE_CLR
-
32.10.1.3 Flash Module Status register (FMSTAT - 0x0x4008 4FE0)
32.10.1.4 Flash Module Status Clear register (FMSTATCLR - 0x0x4008 4FE8)
The read-only FMSTAT register provides a means of determining when signature
generation has completed. Completion of signature generation can be checked by polling
the SIG_DONE bit in FMSTAT. SIG_DONE should be cleared via the FMSTATCLR
register before starting a signature generation operation, otherwise the status might
indicate completion of a previous operation.
The FMSTATCLR register is used to clear the signature generation completion flag.
Description
Description
Word 2 of 128-bit signature (bits 95 to 64).
Word 3 of 128-bit signature (bits 127 to 96).
Description
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
When 1, a previously started signature generation has completed. See
FMSTATCLR register description for clearing this flag.
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
Description
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
Writing a 1 to this bits clears the signature generation completion flag
(SIG_DONE) in the FMSTAT register.
Reserved, user software should not write ones to reserved bits. The value read
from a reserved bit is not defined.
All information provided in this document is subject to legal disclaimers.
Chapter 32: LPC17xx Flash memory interface and programming
Rev. 2 — 19 August 2010
UM10360
© NXP B.V. 2010. All rights reserved.
Reset Value
-
Reset Value
-
Reset Value
NA
0
NA
Reset Value
NA
0
NA
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