LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 12

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

2.1 Memory map and peripheral addressing
Table 3.
2.2 Memory maps
UM10360
User manual
Address range
0x0000 0000 to
0x1FFF FFFF
0x2000 0000 to
0x3FFF FFFF
0x4000 0000 to
0x5FFF FFFF
0xE000 0000 to
0xE00F FFFF
LPC17xx memory usage and details
General Use
On-chip non-volatile
memory
On-chip SRAM
Boot ROM
On-chip SRAM
(typically used for
peripheral data)
GPIO
APB Peripherals
AHB peripherals
Cortex-M3 Private
Peripheral Bus
The ARM Cortex-M3 processor has a single 4 GB address space. The following table
shows how this space is used on the LPC17xx.
The LPC17xx incorporates several distinct memory regions, shown in the following
figures.
program viewpoint following reset. The interrupt vector area supports address remapping,
which is described later in this section.
UM10360
Chapter 2: LPC17xx Memory map
Rev. 2 — 19 August 2010
Figure 3
All information provided in this document is subject to legal disclaimers.
Address range details and description
0x0000 0000 - 0x0007 FFFF
0x0000 0000 - 0x0003 FFFF
0x0000 0000 - 0x0001 FFFF
0x0000 0000 - 0x0000 FFFF
0x0000 0000 - 0x0000 7FFF
0x1000 0000 - 0x1000 7FFF
0x1000 0000 - 0x1000 3FFF
0x1000 0000 - 0x1000 1FFF
0x1FFF 0000 - 0x1FFF 1FFF
0x2007 C000 - 0x2007 FFFF
0x2008 0000 - 0x2008 3FFF
0x2009 C000 - 0x2009 FFFF
0x4000 0000 - 0x4007 FFFF
0x4008 0000 - 0x400F FFFF
0x5000 0000 - 0x501F FFFF
0xE000 0000 - 0xE00F FFFF
shows the overall map of the entire address space from the user
Rev. 2 — 19 August 2010
For devices with 512 kB of flash memory.
For devices with 64 kB of flash memory.
For devices with 32 kB of flash memory.
For devices with 32 kB of local SRAM.
For devices with 16 kB of local SRAM.
For devices with 8 kB of local SRAM.
8 kB Boot ROM with flash services.
AHB SRAM - bank 0 (16 kB), present on
devices with 32 kB or 64 kB of total SRAM.
AHB SRAM - bank 1 (16 kB), present on
devices with 64 kB of total SRAM.
GPIO.
APB0 Peripherals, up to 32 peripheral blocks,
16 kB each.
APB1 Peripherals, up to 32 peripheral blocks,
16 kB each.
DMA Controller, Ethernet interface, and USB
interface.
Cortex-M3 related functions, includes the
NVIC and System Tick Timer.
For devices with 256 kB of flash memory.
For devices with 128 kB of flash memory.
© NXP B.V. 2010. All rights reserved.
User manual
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