LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 522
LPC1767FBD100,551
Manufacturer Part Number
LPC1767FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.LPC1767FBD100551.pdf
(2 pages)
2.LPC1767FBD100551.pdf
(840 pages)
3.LPC1767FBD100551.pdf
(65 pages)
Specifications of LPC1767FBD100,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
LPC17
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4967
935289808551
935289808551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1767FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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25.1 Introduction
25.2 Description
25.3 Pin description
UM10360
User manual
The Motor Control PWM (MCPWM) is optimized for three-phase AC and DC motor control
applications, but can be used in many other applications that need timing, counting,
capture, and comparison.
The MCPWM contains three independent channels, each including:
Input pins MCI0-2 can trigger TC capture or increment a channel’s TC. A global Abort
input can force all of the channels into “A passive” state and cause an interrupt.
Table 453
Table 453. Pin summary
Pin
MCOA0, MCOA1, MCOA2
MCOB0, MCOB1, MCOB2
MCABORT
MCI0, MCI1, MCI2
•
•
•
•
•
•
•
UM10360
Chapter 25: LPC17xx Motor control PWM
Rev. 2 — 19 August 2010
a 32-bit Timer/Counter (TC)
a 32-bit Limit register (LIM)
a 32-bit Match register (MAT)
a 10-bit dead-time register (DT) and an associated 10-bit dead-time counter
a 32-bit capture register (CAP)
two modulated outputs (MCOA and MCOB) with opposite polarities
a period interrupt, a pulse-width interrupt, and a capture interrupt
lists the MCPWM pins.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Type
O
O
I
I
Description
Output A for channels 0, 1, 2
Output B for channels 0, 1, 2
Low-active Fast Abort
Input for channels 0, 1, 2
© NXP B.V. 2010. All rights reserved.
User manual
522 of 840
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