LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 552

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 491: QEI Position Compare register 2 (CMPOS2 - address 0x400B C01C) bit description
Table 492: QEI Index Count register (CMPOS - address 0x400B C020) bit description
Table 493: QEI Index Compare register (CMPOS - address 0x400B C024) bit description
Table 494: QEI Timer Load register (QEILOAD - address 0x400B C028) bit description
Table 495: QEI Timer register (QEITIME - address 0x400B C02C) bit description
UM10360
User manual
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26.6.3.5 QEI Position Compare register 2 (CMPOS2 - 0x400B C01C)
26.6.3.6 QEI Index Count register (INXCNT - 0x400B C020)
26.6.3.7 QEI Index Compare register (INXCMP - 0x400B C024)
26.6.3.8 QEI Timer Reload register (QEILOAD - 0x400B C028)
26.6.3.9 QEI Timer register (QEITIME - 0x400B C02C)
Description
Position compare value 2.
Description
Current index counter value.
Description
Index compare value.
Description
Velocity timer reload value.
Description
Current velocity timer value.
This register contains a position compare value. This value is compared against the
current value of the position register. Interrupts can be enabled to interrupt when the
compare value is equal to the current value of the position register.
This register contains the current value of the index counter. Increments when an index
count occurs.
This register contains an index compare value. This value is compared against the current
value of the index count register. Interrupts can be enabled to interrupt when the compare
value is equal to the current value of the index count register.
This register contains the reload value of the velocity timer. When the timer (QEITIME)
overflows or the RESV bit is asserted, this value is loaded into the timer (QEITIME).
This register contains the current value of the velocity timer. When this timer overflows the
value of velocity counter (QEIVEL) is stored in the velocity capture register (QEICAP), the
velocity counter is reset to zero, the timer is reloaded with the value stored in the velocity
reload register (QEILOAD), and the velocity interrupt (TIM_Int) is asserted.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Chapter 26: LPC17xx Quadrature Encoder Interface (QEI)
UM10360
© NXP B.V. 2010. All rights reserved.
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