LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 727

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
34.3 ARM Cortex-M3 User Guide: Processor
UM10360
User manual
34.3.1.1 Processor mode and privilege levels for software execution
34.3.1.2 Stacks
34.3.1 Programmers model
This section describes the Cortex-M3 programmers model. In addition to the individual
core register descriptions, it contains information about the processor modes and privilege
levels for software execution and stacks.
The processor modes are:
The privilege levels for software execution are:
In Thread mode, the CONTROL register controls whether software execution is privileged
or unprivileged, see
Only privileged software can write to the CONTROL register to change the privilege level
for software execution in Thread mode. Unprivileged software can use the SVC instruction
to make a supervisor call to transfer control to privileged software.
The processor uses a full descending stack. This means the stack pointer indicates the
last stacked item on the stack memory. When the processor pushes a new item onto the
stack, it decrements the stack pointer and then writes the item to the new memory
location. The processor implements two stacks, the main stack and the process stack,
with independent copies of the stack pointer, see
In Thread mode, the CONTROL register controls whether the processor uses the main
stack or the process stack, see
the main stack. The options for processor operations are:
•
•
•
•
Thread mode
Used to execute application software. The processor enters Thread mode when it
comes out of reset.
Handler mode
Used to handle exceptions. The processor returns to Thread mode when it has
finished exception processing.
Unprivileged
The software:
– has limited access to the MSR and MRS instructions, and cannot use the CPS
– cannot access the system timer, NVIC, or system control block
– might have restricted access to memory or peripherals.
Unprivileged software executes at the unprivileged level.
Privileged
The software can use all the instructions and has access to all resources.
Privileged software executes at the privileged level.
instruction
All information provided in this document is subject to legal disclaimers.
Table
Rev. 2 — 19 August 2010
634. In Handler mode, software execution is always privileged.
Table
634. In Handler mode, the processor always uses
Chapter 34: Appendix: Cortex-M3 user guide
Section
34.3.1.3.2.
UM10360
© NXP B.V. 2010. All rights reserved.
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