SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 209

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
10.23.9.1
6500C–ATARM–8-Feb-11
MPU configuration for a microcontroller
Usually, a microcontroller system has only a single processor and no caches. In such a system,
program the MPU as follows:
Table 10-40. Memory region attributes for a microcontroller
In most microcontroller implementations, the share ability and cache policy attributes do not
affect the system behavior. However, using these settings for the MPU regions can make the
application code more portable. The values given are for typical situations. In special systems,
such as multiprocessor designs or designs with a separate DMA engine, the share ability attri-
bute might be important. In these cases refer to the recommendations of the memory device
manufacturer.
Memory region
Flash memory
Internal SRAM
External SRAM
Peripherals
TEX
b000
b000
b000
b000
1
1
1
0
C
B
0
0
1
1
1
S
0
1
1
Memory type and attributes
Normal memory, Non-shareable, write-through
Normal memory, Shareable, write-through
Normal memory, Shareable, write-back, write-allocate
Device memory, Shareable
SAM3S
209

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