SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 368
SAM3S1A
Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S1A
Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
- Current page: 368 of 1118
- Download datasheet (24Mb)
23.8
23.8.1
23.8.1.1
23.8.1.2
368
Standard Read and Write Protocols
SAM3S
Read Waveforms
NRD Waveform
NCS Waveform
In the following sections, NCS represents one of the NCS[0..3] chip select lines.
The read cycle is shown on
The read cycle starts with the address setting on the memory address bus.
Figure 23-5. Standard Read Cycle
The NRD signal is characterized by a setup timing, a pulse width and a hold timing.
Similarly, the NCS signal can be divided into a setup time, pulse length and hold time:
1. NRD_SETUP: the NRD setup time is defined as the setup of address before the NRD
2. NRD_PULSE: the NRD pulse length is the time between NRD falling edge and NRD
3. NRD_HOLD: the NRD hold time is defined as the hold time of address after the NRD
1. NCS_RD_SETUP: the NCS setup time is defined as the setup time of address before
2. NCS_RD_PULSE: the NCS pulse length is the time between NCS falling edge and
3. NCS_RD_HOLD: the NCS hold time is defined as the hold time of address after the
falling edge;
rising edge;
rising edge.
the NCS falling edge.
NCS rising edge;
NCS rising edge.
A[23:0]
D[7:0]
MCK
NRD
NCS
NCS_RD_SETUP
NRD_SETUP
Figure
23-5.
NCS_RD_PULSE
NRD_CYCLE
NRD_PULSE
NRD_HOLD
NCS_RD_HOLD
6500C–ATARM–8-Feb-11
Related parts for SAM3S1A
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
ARM-based Flash MCU
Manufacturer:
ATMEL [ATMEL Corporation]
Datasheet:
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Multistandard Video-IF and Quasi Parallel Sound Processing
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
High-performance EE PLD
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
8-bit Flash Microcontroller
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
2-Wire Serial EEPROM
Manufacturer:
ATMEL Corporation
Datasheet: