SAM3S1A Atmel Corporation, SAM3S1A Datasheet - Page 66

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SAM3S1A

Manufacturer Part Number
SAM3S1A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3S1A

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
10.6.3
10.6.3.1
10.6.3.2
10.6.3.3
10.6.4
66
SAM3S
Exception handlers
Vector table
Interrupt Service Routines (ISRs)
Fault handlers
System handlers
For more information about hard faults, memory management faults, bus faults, and usage
faults, see
The processor handles exceptions using:
Interrupts IRQ0 to IRQ34 are the exceptions handled by ISRs.
Hard fault, memory management fault, usage fault, bus fault are fault exceptions handled by the
fault handlers.
NMI, PendSV, SVCall SysTick, and the fault exceptions are all system exceptions that are han-
dled by system handlers.
The vector table contains the reset value of the stack pointer, and the start addresses, also
called exception vectors, for all exception handlers.
the exception vectors in the vector table. The least-significant bit of each vector must be 1, indi-
cating that the exception handler is Thumb code.
“Interrupt Clear-enable Registers” on page
“Fault handling” on page
70.
154.
Figure 10-3 on page 67
shows the order of
6500C–ATARM–8-Feb-11

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