ISP1760ET,557

Manufacturer Part NumberISP1760ET,557
ManufacturerNXP Semiconductors
ISP1760ET,557 datasheet
 


Specifications of ISP1760ET,557

Package TypeTFBGAPin Count128
Lead Free Status / RoHS StatusCompliant  
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ISP1760
Hi-Speed Universal Serial Bus host controller for embedded
applications
Rev. 04 — 4 February 2008
1. General description
The ISP1760 is a Hi-Speed Universal Serial Bus (USB) host controller with a generic
processor interface. It integrates one Enhanced Host Controller Interface (EHCI), one
Transaction Translator (TT) and three transceivers. The host controller portion of the
ISP1760 and the three transceivers comply to
Rev.
2.0”. The EHCI portion of the ISP1760 is adapted from
Controller Interface Specification for Universal Serial Bus Rev.
The integrated high-performance Hi-Speed USB transceivers enable the ISP1760 to
handle all Hi-Speed USB transfer speed modes: high-speed (480 Mbit/s), full-speed
(12 Mbit/s) and low-speed (1.5 Mbit/s). The three downstream ports allow simultaneous
connection of three devices at different speeds (high-speed, full-speed and low-speed).
The generic processor interface allows the ISP1760 to be connected to various
processors as a memory-mapped resource. The ISP1760 is a slave host: it does not
require ‘bus-mastering’ capabilities of the host system bus. The interface can be
configured, ensuring compatibility with a variety of processors. Data transfer can be
performed on 16 bits or 32 bits, using Programmed Input/Output (PIO) or Direct Memory
Access (DMA) with major control signals configurable as active LOW or active HIGH.
Integration of the TT allows connection to full-speed and low-speed devices, without the
need of integrating Open Host Controller Interface (OHCI) or Universal Host Controller
Interface (UHCI). Instead of dealing with two sets of software drivers, EHCI and OHCI or
UHCI, you need to deal with only one set, EHCI, that dramatically reduces software
complexity and IC cost.
2. Features
I
The host controller portion of the ISP1760 complies with
Specification Rev. 2.0”
I
The EHCI portion of the ISP1760 is adapted from
Interface Specification for Universal Serial Bus Rev. 1.0”
I
Contains three integrated Hi-Speed USB transceivers that support high-speed,
full-speed and low-speed modes
I
Integrates a TT for Original USB (full-speed and low-speed) device support
I
Up to 64 kB internal memory (8 k
interface; operation in multitasking environments is made possible by the
implementation of virtual segmentation mechanism with bank switching on task
request
Product data sheet
Ref. 1 “Universal Serial Bus Specification
Ref. 2 “Enhanced Host
1.0”.
Ref. 1 “Universal Serial Bus
Ref. 2 “Enhanced Host Controller
64 bits) accessible through a generic processor