ISP1760ET,557

Manufacturer Part NumberISP1760ET,557
ManufacturerNXP Semiconductors
ISP1760ET,557 datasheet
 


Specifications of ISP1760ET,557

Package TypeTFBGAPin Count128
Lead Free Status / RoHS StatusCompliant  
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NXP Semiconductors
14.2.3 Multi-cycle: DMA read
Fig 21. DMA read (multi-cycle burst)
Table 99.
T
= 40 C to +85 C; unless otherwise specified.
amb
Symbol Parameter
V
= 1.65 V to 1.95 V
CC(I/O)
t
a16
t
a26
t
d16
t
w16
T
cy16
t
a36
t
a46
t
h16
V
= 3.3 V to 3.6 V
CC(I/O)
t
a16
t
a26
t
d16
t
w16
T
cy16
t
a36
t
a46
t
h16
ISP1760_4
Product data sheet
DREQ
t
a16
DACK
t
T
a26
cy16
t
w16
RD_N
t
h16
DATA
data 0
t
d16
DREQ and DACK are active HIGH.
DMA read (multi-cycle burst)
DACK assertion after DREQ assertion time
RD_N assertion after DACK assertion time
data valid time after RD_N assertion
RD_N pulse width
read-to-read cycle time
DREQ de-assertion time after last burst RD_N
de-assertion
DACK de-assertion to next DREQ assertion
time
data hold time after RD_N de-asserts
DACK assertion after DREQ assertion time
RD_N assertion after DACK assertion time
data valid time after RD_N assertion
RD_N pulse width
read-to-read cycle time
DREQ de-assertion time after last burst RD_N
de-assertion
DACK de-assertion to next DREQ assertion
time
data hold time after RD_N de-asserts
Rev. 04 — 4 February 2008
ISP1760
Embedded Hi-Speed USB host controller
t
t
a36
a46
data n-1
data n
data 1
004aaa531
Min
Max
0
-
0
-
-
31
38
-
46
-
-
30
-
82
-
5
0
-
0
-
-
16
17
-
38
-
-
20
-
82
-
5
© NXP B.V. 2008. All rights reserved.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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