ISP1760ET,557

Manufacturer Part NumberISP1760ET,557
ManufacturerNXP Semiconductors
ISP1760ET,557 datasheet
 

Specifications of ISP1760ET,557

Package TypeTFBGAPin Count128
Lead Free Status / RoHS StatusCompliant  
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Page 51
52
Page 52
53
Page 53
54
Page 54
55
Page 55
56
Page 56
57
Page 57
58
Page 58
59
Page 59
60
Page 60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
Page 58/111

Download datasheet (570Kb)Embed
PrevNext
NXP Semiconductors
Multiple transfers are scheduled to the shared memory for various endpoints by traversing
the next link pointer provided by endpoint data structures, until it reaches the end of the
endpoint list. There are three endpoint lists: one for ISO endpoints, and the other for INTL
and ATL endpoints. If the schedule is enabled, the host controller executes the ISO
schedule, followed by the INTL schedule, and then the ATL schedule.
These lists are traversed and scheduled by the software according to the EHCI traversal
rule. The host controller executes the scheduled ISO, INTL and ATL PTDs. The
completion of a transfer is indicated to the software by the interrupt that can be grouped
under various PTDs by using the AND or OR registers that are available for each schedule
type: ISO, INTL and ATL. These registers are simple logic registers to decide the
completion status of group and individual PTDs. When the logical conditions of the Done
bit is true in the shared memory, it means that PTD has completed.
There are four types of interrupts in the ISP1760: ISO, INTL, ATL and SOF. The latency
can be programmed in multiples of SOF (125 s).
The NextPTD pointer is a feature that allows the ISP1760 to jump unused and skip PTDs.
This will improve the PTD transversal latency time. The NextPTD pointer is not meant for
same or single endpoint. The NextPTD works only in forward direction.
The NextPTD traversal rules defined by the ISP1760 hardware are:
1. Start the PTD memory vertical traversal, considering the skip and LastPTD
information, as follows.
2. If the current PTD is active and not done, perform the transaction.
3. Follow the NextPTD pointer as specified in bits 4 to 0 of DW4.
4. If combined with LastPTD, the LastPTD setting must be at a higher address than the
NextPTD specified. So both are set in a logical manner.
5. If combined with skip, the skip must not be set (logically) on the same position
corresponding to NextPTD, pointed by the NextPTD pointer.
6. If PTD is set for skip, it will be neglected and the next vertical PTD will be considered.
7. If the skipped PTD already has a setting including a NextPTD pointer that will not be
taken into consideration, the behavior will be just as described in the preceding step.
ISP1760_4
Product data sheet
Embedded Hi-Speed USB host controller
Rev. 04 — 4 February 2008
ISP1760
© NXP B.V. 2008. All rights reserved.
57 of 110