LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 110

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LPC47M182

Manufacturer Part Number
LPC47M182
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet

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7.13
7.13.1 Mode Switching/Software Control
7.14
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
Operation
Software will execute P1284 negotiation and all operation prior to a data transfer phase under
programmed I/O control (mode 000 or 001). Hardware provides an automatic control line handshake,
moving data between the FIFO and the ECP port only in the data transfer phase (modes 011 or 010).
Setting the mode to 011 or 010 will cause the hardware to initiate data transfer.
If the port is in mode 000 or 001 it may switch to any other mode. If the port is not in mode 000 or 001 it
can only be switched into mode 000 or 001. The direction can only be changed in mode 001.
Once in an extended forward mode the software should wait for the FIFO to be empty before switching
back to mode 000 or 001. In this case all control signals will be deasserted before the mode switch. In an
ecp reverse mode the software waits for all the data to be read from the FIFO before changing back to
mode 000 or 001. Since the automatic hardware ecp reverse handshake only cares about the state of
the FIFO it may have acquired extra data which will be discarded. It may in fact be in the middle of a
transfer when the mode is changed back to 000 or 001. In this case the port will deassert nAutoFd
independent of the state of the transfer. The design shall not cause glitches on the handshake signals if
the software meets the constraints above.
ECP Operation
Prior to ECP operation the Host must negotiate on the parallel port to determine if the peripheral supports
the ECP protocol. This is a somewhat complex negotiation carried out under program control in mode
000.
After negotiation, it is necessary to initialize some of the port bits. The following are required:
Set Direction = 0, enabling the drivers.
Set strobe = 0, causing the nStrobe signal to default to the deasserted state.
Set autoFd = 0, causing the nAutoFd signal to default to the deasserted state.
Set mode = 011 (ECP Mode)
ECP address/RLE bytes or data bytes may be sent automatically by writing the ecpAFifo or ecpDFifo
respectively.
Table 7.8 – Programming for Configuration Register B (Bits 2:0)
DMA SELECTED
All Others
3
2
1
DATASHEET
110
CONFIG REG B
BITS 2:0
011
010
001
000
Advanced I/O Controller with Motherboard GLUE Logic
SMSC LPC47M182
Datasheet

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