LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 14

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Chapter 3
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
6,31,
49,60,
123
76,93,
107
71
8,29,
46,58,
78,96,
110
70
72
97
65
91
52
53
54
55
56
57,59,
61,62
63
PIN#
VCC
VTR
V_5P0_STBY
VSS
REF5V
REF5V_STBY
F_CAP
CLOCKI
CLOCKI32
nLPCPD
SER_IRQ
nLDRQ
PCI_CLK
nLFRAME
LAD[3:0]
nPCI_RESET
(NOTE 1)
NAME
Description of Pin Functions
+3.3 Volt Main Supply Voltage (5)
+3.3 Volt Standby Supply Voltage (4)
+5 Volt Standby Supply Voltage.
Ground (7)
5V Reference Output. Requires external
pull-up to VCC5V.
Highest System Standby Voltage.
Requires external pull-up to
V_5P0_STBY.
Internal Regulator Filter Capacitor. This
pin is a no connect. A filter capacitor can
be placed on this pin if it is required by
system board layout.
14.318Mhz Clock Input
32.768kHz Clock Input
Active low input Power Down signal
indicates that the LPC47M182 should
prepare for power to be shut-off on the
LPC interface.
Serial IRQ pin used with the PCI_CLK pin
to transfer LPC47M182 interrupts to the
host.
Active low output used for encoded
DMA/Bus Master request for the LPC
interface.
33.33 MHz PCI Clock input.
Active low input indicates start of new
cycle and termination of broken cycle.
Active high LPC I/O used for multiplexed
command, address and data bus.
Active low input used as LPC Interface
Reset. 3.3V and 5V buffered copy of PCI
Reset signal is available on
nPCIRST_OUT and nIDE_RSTDRV.
These pins are listed under GLUE PINS.
PROCESSOR/HOST LPC INTERFACE (11)
Table 3.1 - LPC47M182 Pin Description
POWER AND GROUND PINS (20)
DESCRIPTION
DATASHEET
CLOCKS (2)
14
PWR
PWR
PWR
PWR
AO
AO
IS
IS
PCI_I
PCI_IO
PCI_O
PCI_ICLK
PCI_I
PCI_IO
PCI_I
Advanced I/O Controller with Motherboard GLUE Logic
(NOTE 2)
BUFFER
NAME
VCC
VTR
VCC
VTR
VCC
VCC
VCC
VCC
VCC
VCC
VCC
(NOTE 3)
WELL
PWR
SMSC LPC47M182
4
5
NOTES
Datasheet