LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 45

no-image

LPC47M182

Manufacturer Part Number
LPC47M182
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC47M182-NR
Manufacturer:
SMSC
Quantity:
1
Part Number:
LPC47M182-NR
Manufacturer:
SMSC
Quantity:
6 382
Part Number:
LPC47M182-NR
Manufacturer:
SMSC
Quantity:
20 000
Part Number:
LPC47M182-NW
Manufacturer:
LINEAR
Quantity:
1 630
Part Number:
LPC47M182-NW
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LPC47M182-NW
Manufacturer:
SMSC-Pbf
Quantity:
6
Part Number:
LPC47M182-NW
Manufacturer:
SMSC
Quantity:
20 000
Company:
Part Number:
LPC47M182-NW
Quantity:
500
Part Number:
LPC47M182E-NW
Manufacturer:
Microchip Technology
Quantity:
10 000
Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
6.4.7
SMSC LPC47M182
DATA RATE SELECT REGISTER (DSR)
Address 3F4 WRITE ONLY
This register is write only. It is used to program the data rate, amount of write precompensation, power
down status, and software reset. The data rate is programmed using the Configuration Control Register
(CCR) not the DSR, for PC/AT and PS/2 Model 30.
This register is write only. It is used to program the data rate, amount of write precompensation, power
down status, and software reset. The data rate is programmed using the Configuration Control Register
(CCR) not the DSR, for PC/AT and PS/2 Model 30.
Other applications can set the data rate in the DSR. The data rate of the floppy controller is the most
recent write of either the DSR or CCR. The DSR is unaffected by a software reset. A hardware reset will
set the DSR to 02H, which corresponds to the default precompensation setting and 250 Kbps.
BIT 0 and 1 DATA RATE SELECT
These bits control the data rate of the floppy controller. See Table 6.8 for the settings corresponding to the
individual data rates. The data rate select bits are unaffected by a software reset, and are set to 250 Kbps
after a hardware reset.
BIT 2 through 4 PRECOMPENSATION SELECT
These three bits select the value of write precompensation that will be applied to the WDATA output
signal. Table 6.7 shows the precompensation values for the combination of these bits settings. Track 0 is
the default starting track number to start precompensation. This starting track number can be changed by
the configure command.
BIT 5 UNDEFINED
Should be written as a logic “0”.
RESET
COND.
RESET
S/W
7
0
POWER
DOWN
6
0
Table 6.7 - Precompensation Delays
PRECOMP
432
111
001
010
011
100
101
110
000
DATASHEET
5
0
0
COMP2
PRE-
4
0
Default: See Table 6.10
45
PRECOMPENSATION
<2Mbps
Default
125.00
166.67
208.33
250.00
41.67
83.34
0.00
DELAY (nsec)
COMP1
PRE-
3
0
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
COMP0
Default
2Mbps
104.2
PRE-
20.8
41.7
62.5
83.3
125
0
2
0
DRATE
SEL1
1
1
DRATE
SEL0
0
0

Related parts for LPC47M182