LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 73

no-image

LPC47M182

Manufacturer Part Number
LPC47M182
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC47M182-NR
Manufacturer:
SMSC
Quantity:
1
Part Number:
LPC47M182-NR
Manufacturer:
SMSC
Quantity:
6 382
Part Number:
LPC47M182-NR
Manufacturer:
SMSC
Quantity:
20 000
Part Number:
LPC47M182-NW
Manufacturer:
LINEAR
Quantity:
1 630
Part Number:
LPC47M182-NW
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
LPC47M182-NW
Manufacturer:
SMSC-Pbf
Quantity:
6
Part Number:
LPC47M182-NW
Manufacturer:
SMSC
Quantity:
20 000
Company:
Part Number:
LPC47M182-NW
Quantity:
500
Part Number:
LPC47M182E-NW
Manufacturer:
Microchip Technology
Quantity:
10 000
Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
6.20
6.21
6.22
6.22.1 Configure Default Values:
SMSC LPC47M182
Sense Drive Status
Sense Drive Status obtains drive status information. It has not execution phase and goes directly to the
result phase from the command phase. Status Register 3 contains the drive status information.
Specify
The Specify command sets the initial values for each of the three internal times. The HUT (Head Unload
Time) defines the time from the end of the execution phase of one of the read/write commands to the head
unload state. The SRT (Step Rate Time) defines the time interval between adjacent step pulses. Note that
the spacing between the first and second step pulses may be shorter than the remaining step pulses. The
HLT (Head Load Time) defines the time between when the Head Load signal goes high and the read/write
operation starts. The values change with the data rate speed selection and are documented in Table 6.26.
The values are the same for MFM and FM.
DMA operation is selected by the ND bit. When ND is “0”, the DMA mode is selected. This part does not
support non-DMA mode. In DMA mode, data transfers are signaled by the DMA request cycles.
Configure
The Configure command is issued to select the special features of the FDC. A Configure command need
not be issued if the default values of the FDC meet the system requirements.
EIS - No Implied Seeks
EFIFO - FIFO Disabled
POLL - Polling Enabled
FIFOTHR - FIFO Threshold Set to 1 Byte
PRETRK - Pre-Compensation Set to Track 0
EIS - Enable Implied Seek. When set to "1", the FDC will perform a Seek operation before executing a read
or write command. Defaults to no implied seek.
00
01
02
7F
7F
E
F
0
1
..
..
2M
64
56
60
4
..
63.5
2M
0.5
64
63
1
..
128
112
120
1M
8
..
Table 6.26 - Drive Control Delays (ms)
500K
256
224
240
16
..
HUT
128
126
127
1M
1
2
..
DATASHEET
300K
26.7
426
373
400
..
250K
512
448
480
32
..
73
500K
256
252
254
2
4
..
3.75
0.25
2M
0.5
4
..
HLT
1M
7.5
0.5
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
8
..
1
300K
426
420
423
3.3
6.7
..
500K
16
15
..
2
1
SRT
300K
26.7
3.33
1.67
25
..
250K
512
504
508
4
8
.
250K
32
30
..
4
2

Related parts for LPC47M182