LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 218

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
Tr
Tf
Tpropr
Tpropf
CO
CL
NAME
Tr
Tf
Tpropr
Tpropf
NAME
NAME
Tpropf
CO
CL
Tf
SCK_BJT_GATE (B) low to high fall time. Measured
form 90% to 10%
SCK_BJT_GATE (B) high to low propagation time.
Measured from PWRGD_PLATFORM (A) to
SCK_BJT_GATE (B).
Output Capacitance
Load Capacitance
PWRGD_PLATFORM (B) low to high rise time.
PWRGD_PLATFORM (B) low to high fall time.
Measured form 90% to 10%
PWRGD_PLATFORM (B) low to high propagation time.
Measured from nFPRST (A) to PWRGD_PLATFORM
(B).
PWRGD_PLATFORM (B) high to low propagation time.
Measured from nFPRST (A) to PWRGD_PLATFORM
(B).
Output Capacitance
Load Capacitance
DESCRIPTION (Refer to Figure 13.29)
nCDC_DWN_RST (B) rise time. Measured
from 10% to 90%.
nCDC_DWN_RST (B) fall time. Measured
from 90% to 10%.
nCDC_DWN_RST (B) low to high
propagation delay. Measured from
nAUD_LNK_RST (A) or nCDC_DWN_ENAB
(A) to nCDC_DWN_RST (B).
nCDC_DWN_RST (B) high to low
propagation delay. Measured from
nAUD_LNK_RST (A) or nCDC_DWN_ENAB
(A) to nCDC_DWN_RST (B).
DESCRIPTION (Refer to Figure 13.29)
DESCRIPTION (Refer to Figure 13.29)
Table 13.6 – CNR CODEC Down Enable Timing
Table 13.5 – PWRGD_PLATFORM Timing
Table 13.4 – SCK_BJT_GATE Timing
DATASHEET
218
MIN
Advanced I/O Controller with Motherboard GLUE Logic
MIN
MIN
TYP
TYP
TYP
6
6
15.3
15.3
MAX
MAX
MAX
50
25
50
50
50
25
50
1
1
1
us
us
ns
ns
UNITS
SMSC LPC47M182
UNITS
UNITS
ns
us
pF
pF
ns
us
us
pF
pF
ns
Datasheet