LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 158

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
Keyboard Scan
Code
Default = 0x00
Tach1 LSB
Default = 0x00 on
VTR POR
Tach1 MSB
Default = 0x00 on
VTR POR
Tach2 LSB
Default = 0x00 on
VTR POR
Tach2 MSB
Default = 0x00 on
VTR POR
Default = 0x84 on
VTR POR
MSC_STS
Default = 0x00
on VTR POR
on VTR POR
nIO_PME
Register
NAME
Bits[3:2] are Read
Only when Bit[3]
0x16
(R/W)
except
REG OFFSET
set to ‘1’
(Type)
(R/W)
(R/W)
0x17
0x11
0x12
0x13
0x14
0x15
(R)
(R)
(R)
(R)
DATASHEET
Keyboard Scan Code
Bit[0] LSB of Scan Code
Bit[7] MSB of Scan Code
This register is least significant 8-bit of the 16-bit Fan
Tachometer 1 reading.
Bit[0] FAN_TACH1 Reading Bit 0
…
Bit[7] FAN_TACH1 Reading Bit 7
This register is most significant 8-bit of the 16-bit Fan
Tachometer 1 reading.
Bit[0] FAN_TACH1 Reading Bit 8
…
Bit[7] FAN_TACH1 Reading Bit 15
This register is least significant 8-bit of the 16-bit Fan
Tachometer 2 reading.
Bit[0] FAN_TACH2 Reading Bit 0
…
Bit[7] FAN_TACH2 Reading Bit 7
This register is most significant 8-bit of the 16-bit Fan
Tachometer 2 reading.
Bit[0] FAN_TACH2 Reading Bit 8
…
Bit[7] FAN_TACH2 Reading Bit 15
0=Push Pull
Miscellaneous Status Register
Bits[1:0] can be cleared by writing a 1 to their position
(writing a 0 has no effect).
Bit[0] Either Edge Triggered Interrupt Input 0 Status. This
bit is set when an edge occurs on the GP21 pin.
Bit[1] Either Edge Triggered Interrupt Input 1 Status. This
bit is set when an edge occurs on the GP22 pin.
Bit[7:2] Reserved. This bit always returns zero.
. . .
. . .
. . .
Bit[0] nIO_PME Reserved
Bit[1]nIO_PME Polarity : =1 Invert, =0 No Invert
Bit[2] PWRGD_PLATFORM_SEL
1 = select PWRGD_PLATFORM delay (default)
0 = select no delay for PWRGD_PLATFORM
Bit[3] PWRGD_PLAFORM LOCK
1 = When set to one, Bit[2] and Bit[3] of this register
become RO. They remain RO until a VTR POR.
0 = no lock operation (Default)
Bits[6:4] Reserved
Bit[7] nIO_PME Output Type Select
1=Open Drain (default)
158
DESCRIPTION
Advanced I/O Controller with Motherboard GLUE Logic
SMSC LPC47M182
Datasheet