LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 169

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Datasheet
11.1.8 Programming Example
Notes:
LD_NUM Bit
SMSC LPC47M182
The following is an example of a configuration program in Intel 8086 assembly language.
The LD_NUM bit in the TEST 7 global configuration register (0x29) is used to select between the logical device
numbering in the LPC47M182. See the TEST 7 register for LD_NUM bit description. Table 11.1 and Table 11.2
summarize the logical device registers when LD_NUM bit is 0 and 1.
1)
2)
3)
HARD RESET: nPCI_RESET pin asserted
SOFT RESET: Bit 0 of Configuration Control register set to one
All host accesses are blocked for 500µs after Vcc POR (see Power-up Timing Diagram)
;-------------------------------------------------.
; ENTER CONFIGURATION MODE |
;-------------------------------------------------‘
MOV
MOV
OUT
;-----------------------------------------------.
; CONFIGURE REGISTER CRE0, |
; LOGICAL DEVICE 8
;-----------------------------------------------‘
MOV
MOV
OUT
MOV
MOV
OUT
;
MOV
MOV
OUT
MOV
MOV
OUT
;------------------------------------------------.
; EXIT CONFIGURATION MODE
;-----------------------------------------------‘
MOV
MOV
OUT
DX,02EH
AX,055H
DX,AL
DX,02EH
AL,07H
DX,AL ;Point to LD# Config Reg
DX,02FH
AL, 08H
DX,AL;Point to Logical Device 8
DX,02EH
AL,E0H
DX,AL
DX,02fH
AL,02H
DX,AL
DX,02EH
AX,0AAH
DX,AL
; Point to CRE0
; Update CRE0
DATASHEET
169
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Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)