LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 66

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

6.12
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
At the completion of the Read Data command, the head is not unloaded until after the Head Unload Time
Interval (specified in the Specify command) has elapsed. If the host issues another command before the
head unloads, then the head settling time may be saved between subsequent reads.
If the FDC detects a pulse on the nINDEX pin twice without finding the specified sector (meaning that the
diskette’s index hole passes through index detect logic in the drive twice), the FDC sets the IC code in
Status Register 0 to
indicating a sector not found, and terminates the Read Data Command.
After reading the ID and Data Fields in each sector, the FDC checks the CRC bytes. If a CRC error occurs
in the ID or data field, the FDC sets the IC code in Status Register 0 to “01” indicating abnormal
termination, sets the DE bit flag in Status Register 1 to “1”, sets the DD bit in Status Register 2 to “1” if
CRC is incorrect in the ID field, and terminates the Read Data Command. Table 6.20 describes the effect
of the SK bit on the Read Data command execution and results. Except where noted in Table 6.20, the C
or R value of the sector address is automatically incremented (see Table 6.22).
Read Deleted Data
This command is the same as the Read Data command, only it operates on sectors that contain a Deleted
Data Address Mark at the beginning of a Data Field.
Table 6.21 describes the effect of the SK bit on the Read Deleted Data command execution and results.
Except where noted in Table 6.21, the C or R value of the sector address is automatically incremented
(see Table 6.22).
SK BIT
VALUE
0
0
1
1
MT
0
1
0
1
0
1
Table 6.20 - Skip Bit vs Read Data Command
DATA ADDRESS
ENCOUNTERED
N
1
1
2
2
3
3
MARK TYPE
Deleted Data
Deleted Data
Normal Data
Normal Data
“01” indicating abnormal termination, sets the ND bit in Status Register 1 to “1”
Table 6.19 - Effects of MT and N Bits
MAXIMUM TRANSFER
CAPACITY
256 x 26 = 6,656
256 x 52 = 13,312
512 x 15 = 7,680
512 x 30 = 15,360
1024 x 8 = 8,192
1024 x 16 = 16,384
DATASHEET
SECTOR
READ?
Yes
Yes
Yes
No
66
CM BIT OF
ST2 SET?
FINAL SECTOR READ
FROM DISK
26 at side 0 or 1
26 at side 1
15 at side 0 or 1
15 at side 1
8 at side 0 or 1
16 at side 1
Yes
Yes
No
No
RESULTS
Advanced I/O Controller with Motherboard GLUE Logic
Normal
termination.
Address not
incremented. Next
sector not
searched for.
Normal
termination.
Normal
termination.
Sector not read
(“skipped”).
DESCRIPTION
OF RESULTS
SMSC LPC47M182
Datasheet