LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 190

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
KRST_GA20
Default = 0x00
on VCC POR,
VTR POR and
HARD RESET
Bits[7:5] reset on
VTR POR only
NAME
Table 11.13 – Keyboard Logical Device Configuration Registers
INDEX
REG
0xF0
R/W
DATASHEET
KRESET and GateA20 Select
Bit[7] ISO_MODE
= 0 Mode 1 (default) – Isolate the 8042 in hardware
while the nLPCPD signal is active OR when the
Keyboard and Mouse isolation bits are set by software.
= 1 Mode 2 – Keyboard and mouse isolation bits set
by software only. Note: the input path to the 8042 is
also isolated while the nLPCPD signal is active.
Bit[6] M_ISO. Enables/disables isolation of mouse
signals into 8042. Does not affect MDAT signal to
mouse wakeup (PME) logic.
1=block mouse clock and data signals into 8042
0= do not block mouse clock and data signals into
8042
Bit[5] K_ISO. Enables/disables isolation of keyboard
signals into 8042. Does not affect KDAT signal to
keyboard wakeup (PME) logic.
1=block keyboard clock and data signals into 8042
0= do not block keyboard clock and data signals into
8042
Bit[4] MLATCH
MINT (default)
Bit[3] KLATCH
KINT (default)
Bit[2] Port 92 Select
Bit[1] Reserved
Bit[0] Reserved
= 0 MINT is the 8042 MINT ANDed with Latched
= 1 MINT is the latched 8042 MINT
= 0 KINT is the 8042 KINT ANDed with Latched
= 1 KINT is the latched 8042 KINT
= 0 Port 92 Disabled
= 1 Port 92 Enabled
190
DEFINITION
Advanced I/O Controller with Motherboard GLUE Logic
SMSC LPC47M182
Datasheet