LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 184

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LPC47M182

Manufacturer Part Number
LPC47M182
Description
ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
Manufacturer
SMSC Corporation
Datasheet

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Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
FDD Mode Register
Default = 0x0E
on VCC POR,
VTR POR and
HARD RESET
Table 11.9 – Floppy Disk Controller Logical Device Configuration Registers
NAME
REG INDEX
0xF0 R/W
DATASHEET
Note: Bits[0, 2, 3, 7] in this register are mapped to
0xF8 register.
Bit[0] Floppy Mode
Bit[1] FDC DMA Mode
= 0
= 1
Bit[3:2] Interface Mode
= 11
= 10
= 01
= 00
Notes:
Bit[4] FDC_SWAP
0 = Do Not Swap (default)
1 = Swap Drive 0 (nDS, nMTR pins) with Drive 1
(nDS, nMTR pins)
Bit[5] Reserved, set to zero
Bit[6] FDC Output Type Control
= 0
= 1
Bit[7] FDC Output Control
= 0
= 1
= 0
= 1
Setting Bit[3:2] to “10” will not change the state of
Bit[2] in 0xF8.
Setting Bit[3:2] to “00” will not change the state of
Bit[2] in 0xF8; however, Model 30 mode will be
selected.
184
Normal Floppy Mode (default)
Enhanced Floppy Mode 2 (OS2)
Burst Mode is enabled
Non-Burst Mode (default)
AT Mode (default)
(Reserved)
PS/2
Model 30
FDC outputs are OD12 open drain (default)
FDC outputs are O12 push-pull
FDC outputs active (default)
FDC outputs tri-stated
DEFINITION
Advanced I/O Controller with Motherboard GLUE Logic
SMSC LPC47M182
Datasheet

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