LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 82

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

6.28.7 LINE CONTROL REGISTER (LCR)
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
MODE
ONLY
BIT 3
FIFO
Address Offset = 3H, DLAB = 0, READ/WRITE
This register contains the format information of the serial line. The bit definitions are:
Bits 0 and 1
0
0
0
1
0
0
BIT 2
IDENTIFICATION
0
1
1
1
0
0
INTERRUPT
REGISTER
BIT 1
0
1
0
0
1
0
BIT 0
Table 6.29 - Interrupt Control Table
1
0
0
0
0
0
PRIORIT
Y LEVEL
Highest
Second
Second
Fourth
Third
Start LSB Data 5-8 bits MSB Parity
DATASHEET
-
Serial Data
INTERRUPT SET AND RESET FUNCTIONS
Received Data
Receiver Line
INTERRUPT
Transmitter
Character
Indication
Available
MODEM
Register
Timeout
82
Holding
Status
Empty
Status
TYPE
None
Removed From or
there is at least 1
Framing Error or
Holding Register
or Ring Indicator
Clear to Send or
during the last 4
Data Set Ready
Stop
char in it during
Char times and
Break Interrupt
or Data Carrier
No Characters
Overrun Error,
Receiver Data
INTERRUPT
RCVR FIFO
Parity Error,
Input to the
Transmitter
Have Been
SOURCE
Available
Advanced I/O Controller with Motherboard GLUE Logic
this time
Empty
Detect
None
Buffer or the FIFO
Reading the Line
Holding Register
drops below the
Reading the IIR
MODEM Status
Status Register
Receiver Buffer
Read Receiver
INTERRUPT
trigger level.
Reading the
Reading the
Interrupt) or
Transmitter
CONTROL
Register (if
Writing the
Source of
Register
Register
RESET
-
SMSC LPC47M182
Datasheet