LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 5

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
7.18
7.19
7.20
7.21
7.22
7.23
7.24
SMSC LPC47M182
7.4.1
7.4.2
7.4.3
7.4.4
7.4.5
7.4.6
7.4.7
7.4.8
7.5.1
7.8.1
7.10.1
7.10.2
7.11.1
7.12.1
7.12.2
7.12.3
7.12.4
7.12.5
7.12.6
7.12.7
7.12.8
7.12.9
7.13.1
7.21.1
7.21.2
7.21.3
7.21.4
7.21.5
7.23.1
7.23.2
7.23.3
7.23.4
7.23.5
7.23.6
7.23.7
7.23.8
Parallel Port ....................................................................................................................................... 95
IBM XT/AT Compatible, Bi-Directional and EPP Modes................................................................... 96
EPP 1.9 Operation ............................................................................................................................ 99
EPP 1.9 Write .................................................................................................................................. 100
EPP 1.9 Read.................................................................................................................................. 100
EPP 1.7 Operation .......................................................................................................................... 101
EPP 1.7 Write .................................................................................................................................. 101
EPP 1.7 Read .............................................................................................................................. 101
ECP Implementation Standard ....................................................................................................103
Register Definitions ...................................................................................................................... 104
Operation ..................................................................................................................................... 110
ECP Operation ............................................................................................................................. 110
Termination from ECP Mode ....................................................................................................... 111
Command/Data ............................................................................................................................ 111
Data Compression ....................................................................................................................... 111
Pin Definition ................................................................................................................................ 112
LPC Connections ......................................................................................................................... 112
Interrupts ...................................................................................................................................... 112
FIFO Operation ............................................................................................................................ 112
Power Management ..................................................................................................................... 114
Serial IRQ..................................................................................................................................... 114
Interrupt Generating Registers..................................................................................................... 117
DATA PORT ...........................................................................................................................................96
Status Port..............................................................................................................................................97
CONTROL PORT ...................................................................................................................................97
EPP ADDRESS PORT ...........................................................................................................................98
EPP DATA PORT 0 ................................................................................................................................98
EPP DATA PORT 1 ................................................................................................................................99
EPP DATA PORT 2 ................................................................................................................................99
EPP DATA PORT 3 ................................................................................................................................99
Software Constraints ..............................................................................................................................99
Software Constraints ............................................................................................................................101
Extended Capabilities Parallel Port ...................................................................................................102
Vocabulary ........................................................................................................................................102
Description ........................................................................................................................................103
DATA and ecpAFifo PORT ...............................................................................................................105
DEVICE STATUS REGISTER (dsr) ..................................................................................................106
DEVICE CONTROL REGISTER (dcr)...............................................................................................106
CFIFO (Parallel Port Data FIFO).......................................................................................................107
ECPDFIFO (ECP Data FIFO)............................................................................................................107
tFifo (Test FIFO Mode)......................................................................................................................107
cnfgA (Configuration Register A).......................................................................................................108
cnfgB (Configuration Register B).......................................................................................................108
ecr (Extended Control Register)........................................................................................................108
Mode Switching/Software Control .....................................................................................................110
DMA TRANSFERS ...........................................................................................................................113
DMA Mode - Transfers from the FIFO to the Host ............................................................................113
Programmed I/O Mode or Non-DMA Mode.......................................................................................113
Programmed I/O - Transfers from the FIFO to the Host....................................................................114
Programmed I/O - Transfers from the Host to the FIFO....................................................................114
Timing Diagrams For SER_IRQ Cycle ..............................................................................................115
SER_IRQ Cycle Control....................................................................................................................115
SER_IRQ Data Frame ......................................................................................................................116
Stop Cycle Control ............................................................................................................................117
Latency .............................................................................................................................................117
EOI/ISR Read Latency......................................................................................................................117
AC/DC Specification Issue ................................................................................................................117
Reset and Initialization ......................................................................................................................117
DATASHEET
5
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)