LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 36

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

6.3.8
6.3.9
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
The DMA mechanism for the LPC bus is described in the “Low Pin Count (LPC) Interface Specification,”
Revision 1.0.
POWER MANAGEMENT
CLOCKRUN Protocol
The CLKRUN# pin is not implemented in the LPC47M182.
See the “Low Pin Count (LPC) Interface Specification” Revision 1.0, Section 8.1.
LPCPD Protocol
See the “Low Pin Count (LPC) Interface Specification” Revision 1.0, Section 8.2.
SYNC Protocol
See the “Low Pin Count (LPC) Interface Specification” Revision 1.0, Section 4.2.1.8 for a table of valid
SYNC values.
Typical Usage
The SYNC pattern is used to add wait states. For read cycles, the LPC47M182 immediately drives the
SYNC pattern upon recognizing the cycle. The host immediately drives the sync pattern for write cycles. If
the LPC47M182 needs to assert wait states, it does so by driving 0101 or 0110 on LAD[3:0] until it is
ready, at which point it will drive 0000 or 1001. The LPC47M182 will choose to assert 0101 or 0110, but
not switch between the two patterns.
The data (or wait state SYNC) will immediately follow the 0000 or 1001 value. The SYNC value of 0101 is
intended to be used for normal wait states, wherein the cycle will complete within a few clocks. The
LPC47M182 uses a SYNC of 0101 for all wait states in a DMA transfer.
The SYNC value of 0110 is intended to be used where the number of wait states is large. This is provided
for EPP cycles, where the number of wait states could be quite large (>1 microsecond). However, the
LPC47M182 uses a SYNC of 0110 for all wait states in an I/O transfer.
The SYNC value is driven within 3 clocks.
SYNC Timeout
The SYNC value is driven within 3 clocks. If the host observes 3 consecutive clocks without a valid SYNC
pattern, it will abort the cycle.
The LPC47M182 does not assume any particular timeout. When the host is driving SYNC, it may have to
insert a very large number of wait states, depending on PCI latencies and retries.
SYNC Patterns and Maximum Number of SYNCS
If the SYNC pattern is 0101, then the host assumes that the maximum number of SYNCs is 8.
If the SYNC pattern is 0110, then no maximum number of SYNCs is assumed. The LPC47M182 has
protection mechanisms to complete the cycle. This is used for EPP data transfers and should utilize the
same timeout protection that is in EPP.
DATASHEET
36
Advanced I/O Controller with Motherboard GLUE Logic
SMSC LPC47M182
Datasheet