LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 143

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
7.35
SMSC LPC47M182
PWRGD_PS
PWRGD_PS
0
1
1
SMBus Isolation Circuitry
The SMBus Isolation circuitry is used to isolate the main SMBus signals from the resume SMBus signals
during power down modes. The SMB data pins and the SMB clock pins function as inputs shorted together
through the isolation resistor when the switch is closed. The SMBus signals require external pull-up
resistors on LPC47M182. See Figure 7.11 for recommended schematic implementation. The switch is
controlled by the PWRGD_PS signal. The switch is closed as long as PWRGD_PS is ‘1’. The current flow
is controlled by the external signals on the SMB pins. See Table 7.35 and Table 7.36 for the current flow
across the switch based on the voltage levels on the pins. The switch provides a 25ohm resistance to
ground.
These pins are powered by VTR.
0
1
1
SMB_CLK_M
SMB_DAT_M
SMB_CLK_R
SMB_DAT_R
NAME
SMB_DAT_M
SMB_CLK_M
3.6V (max)
Don’t Care
3.6V (max)
Don’t Care
0V
0V
Table 7.35 – SMB_CLK Isolation Logic
Table 7.36 – SMB_DAT Isolation Logic
IO_SW
IO_SW
IO_SW
IO_SW
Table 7.34 – SMBus Isolation Pins
BUFFER
DATASHEET
SMB_DAT_R
143
POWER
VTR
VTR
VTR
VTR
Don’t Care
3.6V (max)
SMB_CLK_R
WELL
Don’t Care
3.6V (max)
0V
0V
Main Well SMBus Clock
Main Well SMBus Data
Resume Well SMBus Clock
Resume Well SMBus Data
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
DESCRIPTION
CURRENT DIRECTION ACROSS THE
CURRENT ACROSS THE SWITCH
Current flows from SMB_CLK_R or
Current flows from SMB_DAT_R or
No Current flow (0 mA)
No Current flow (0 mA)
No Current flow (0 mA)
No Current flow (0 mA)
SMB_DAT_M
SMB_CLK_M
SWITCH