LPC47M182 SMSC Corporation, LPC47M182 Datasheet - Page 41

• Manufacturer Part Number: LPC47M182
• Description: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
• Manufacturer: SMSC Corporation

Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
SMSC LPC47M182
BIT 0 MOTOR ENABLE 0
Active high status of the MTR0 disk interface output pin. This bit is low after a hardware reset and
unaffected by a software reset.
BIT 1 MOTOR ENABLE 1
Active high status of the MTR1 disk interface output pin. This bit is low after a hardware reset and
unaffected by a software reset.
BIT 2 WRITE GATE
Active high status of the WGATE disk interface output.
BIT 3 READ DATA TOGGLE
Every inactive edge of the RDATA input causes this bit to change state.
BIT 4 WRITE DATA TOGGLE
Every inactive edge of the WDATA input causes this bit to change state.
BIT 5 DRIVE SELECT 0
Reflects the status of the Drive Select 0 bit of the DOR (address 3F2 bit 0). This bit is cleared after a
hardware reset and it is unaffected by a software reset.
BIT 6 RESERVED
Always read as a logic “1”.
BIT 7 RESERVED
Always read as a logic “1”
PS/2 Model 30 Mode
BIT 0 nDRIVE SELECT 2
The DS2 disk interface is not supported.
RESET
COND.
RESET
COND.
7
1
1
nDRV2
N/A
7
6
1
1
nDS1
6
1
DATASHEET
DRIVE
SEL0
nDS0
5
0
5
1
TOGGLE
WDATA
WDATA
41
F/F
4
0
4
0
TOGGLE
RDATA
RDATA
F/F
3
0
3
0
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
WGATE
WGATE
F/F
2
0
2
0
nDS3
MOT
EN1
1
1
1
0
nDS2
0
1
MOT
EN0
0
0