28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 103
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28478G-18
Manufacturer Part Number
28478G-18
Description
Multichannel Synchronous Communications Controller 208-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.28478G-18.pdf
(195 pages)
Specifications of 28478G-18
Package
208BGA
Maximum Data Rate
32768 Kbps
Transmission Media Type
Wire
Power Supply Type
Analog
Typical Supply Current
250 mA
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
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The Subchannel Map can map bits 1–7 from each time slot to any of 32 channels in a channel group. The map for
bit 0 is allocated, but unused (bit 0 is mapped by the time slot map). The Subchannel Map consists of 256
descriptors representing 32 channels and 8 bits per channel. Two subchannel descriptors (2 dwords) are required
to describe the treatment of 8 bits of one channel. The first dword describes the treatment of the lower 4 bits, and
the second dword describes the treatment of the upper 4 bits.
Table 5-16
each subchannel descriptor.
Table 5-16.
Table 5-17.
To enable the subchanneling feature, both the Time Slot Map and the Subchannel Map must be copied into
MUSYCC’s internal registers because it is from here time slot-to-channel mapping and channel-to-subchannel
28478-DSH-002-E
Bit Field
30:29
28:24
22:21
20:16
14:13
12:8
6:5
4:0
31
23
15
7
lists the subchannel descriptor location and byte offset.
Byte Offset
Transmit or Receive Subchannel Map
Subchannel Descriptor
00h
04h
08h
0Ch
F8h
FCh
...
...
BITEN3/7
BITEN2/6
BITEN1/5
BITEN0/3
CH3[4:0]
CH2[4:0]
CH1[4:0]
CH0[4:0]
Preliminary Information / Mindspeed Proprietary and Confidential
Name
RSVD
RSVD
RSVD
RSVD
Mindspeed Technologies
Ch31, Bit 3
Ch31, Bit 7
Ch0, Bit 3
Ch0, Bit 7
Ch1, Bit 3
Ch1, Bit 7
MSB
....
....
Value
0–31
0–31
0–31
0–31
0
1
0
0
1
0
0
1
0
0
1
0
Ch31, Bit 2
Ch31, Bit 6
Ch0, Bit 2
Ch0, Bit 6
Ch1, Bit 2
Ch1, Bit 6
....
....
Bit disabled.
Bit enabled.
Reserved.
Channel number assigned to this bit.
Bit disabled.
Bit enabled.
Reserved.
Channel number assigned to this bit.
Bit disabled.
Bit enabled.
Reserved.
Channel number assigned to this bit.
Bit disabled.
Bit enabled.
Reserved.
Channel number assigned to this bit.
Table 5-17
®
lists the value and description of
Ch31, Bit 1
Ch31, Bit 5
Ch0, Bit 5
Ch1, Bit 5
Ch0, Bit 1
Ch1, Bit 1
....
....
Description
Memory Organization
Ch31, Bit 4
Ch0, Bit 4
Ch1, Bit 4
Unused
Unused
Unused
LSB
...
...
90
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