28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 80

• Manufacturer Part Number: 28478G-18
• Description: Multichannel Synchronous Communications Controller 208-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of 28478G-18

• Package: 208BGA
• Maximum Data Rate: 32768 Kbps
• Transmission Media Type: Wire
• Power Supply Type: Analog
• Typical Supply Current: 250 mA
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V

allocated 4 dword transmit and receive FIFO buffers can tolerate up to 2 dwords (1 ms) of bus latency in the
transmit direction and 3 dwords (1.5 ms) of bus latency in the receive direction.
4.7.1
With some subchanneling, only the Fixed Data Buffer (total of 64 dwords) is the area available for Internal Data
Buffer usage. If the buffer space is evenly divided across 32 channels, the BUFFLOC and BUFFLEN specifications
would be as described in
allocation on 32 channels.
Table 4-3.
With no subchanneling, the Fixed Data Buffer area plus the Subchannel Map area are available for Internal Data
Buffer usage (total of 128 dwords). If the buffer space is evenly divided across 32 channels, the BUFFLOC and
BUFFLEN specification is as listed in
Table 4-4.
28478-DSH-002-E
FOOTNOTE:
(1)
(2)
FOOTNOTE:
(1)
(2)
Assuming all channels within a group operate at the same bit rate, BUFFLEN = [(Total dwords
BUFFLEN values larger than 1Fh do not increase the PCI burst length. BUFFLEN determines the number of dwords burst during a PCI
read/write operation to fill or flush the internal data buffer. For example, BUFFLEN = 1Fh specifies a burst length of 32 dwords.
Assuming all channels within a group operate at the same bit rate, BUFFLEN = [(Total dwords
BUFFLEN values larger than 1Fh do not increase the PCI burst length. BUFFLEN determines the number of dwords burst during a PCI
read/write operation to fill or flush the internal data buffer. For example, BUFFLEN = 1Fh specifies a burst length of 32 dwords.
Channel
Channel
Number
Number
31
31
...
...
0
1
2
0
1
2
Example of 32-Channel with Subchanneling Buffer Allocation (Receive or Transmit)
Example of 32-Channel without Subchanneling Buffer Allocation (Receive or Transmit)
Example Channel BUFFLOC and BUFFLEN Specification
Table 5-18, Channel Configuration
Preliminary Information / Mindspeed Proprietary and Confidential
Mindspeed Technologies
Table
(dword Offset from Start of
(dword Offset from Start of
Fixed Data Buffer)
Fixed Data Buffer)
4-4, for 32 channels without subchannel buffer allocation.
BUFFLOC
BUFFLOC
31
62
...
...
0
1
2
0
2
4
Within Channel Descriptor
Within Channel Descriptor
Descriptor.
®
Table 4-3
÷
÷
Number of Channels)
Number of Channels)
lists the subchannel buffer
BUFFLEN
BUFFLEN
0
1
...
...
0
0
0
1
1
1
(2)
(2)
Serial Interface
(1)
(1)
÷
÷
2]–1.
2]–1.
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