28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 114

• Manufacturer Part Number: 28478G-18
• Description: Multichannel Synchronous Communications Controller 208-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of 28478G-18

• Package: 208BGA
• Maximum Data Rate: 32768 Kbps
• Transmission Media Type: Wire
• Power Supply Type: Analog
• Typical Supply Current: 250 mA
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V

Table 5-28.
Table 5-29.
Table 5-30.
5.2.5.2
The Interrupt Descriptor describes the format of data transferred into the queue. This 32-bit word includes bit fields
for the following:
•
•
•
•
All interrupts are associated with a channel group, channel number, and direction of the channel with the following
exceptions:
1. When an OOF or COFA condition is detected on a serial port, only one interrupt is generated for the entire
2. The ILOST interrupt bit indicates that one or more interrupt was lost internally due to a lack of internal queuing
28478-DSH-002-E
Field
Field
31:15
31:2
14:0
Bit
1:0
Bit
Identifying the interrupt source from within MUSYCC. Channel group number (0–8), channel number (0–31),
and direction (receive or transmit) are provided. There are 256 possible channel sources.
Events assisting the host in synchronizing channel activities.
Errors and unexpected conditions resulting in lost data, discontinued message processing, or prevented
successful completion of a service request.
Number of bytes transferred to or from shared memory when a memory buffer has been completely processed.
group until the condition is cleared and the condition reoccurs. The group is identified by the GRP field, and the
direction is identified by the DIR field. The CH field is the channel number currently being serviced when this
condition is detected.
space. This occurs when MUSYCC generates more interrupt descriptors than can be stored in the Interrupt
Queue in shared memory. The latency of host processing of the Interrupt Queue can also be a factor. This
condition is conveyed by MUSYCC overwriting the ILOST bit field in the last interrupt descriptor in an internal
queue prior to being transferred to shared memory. The bit field is not specific to or associated with the
Byte Offset
00h
04h
IQPTR[30:0]
IQLEN[14:0]
IQPTR[1:0]
Interrupt Queue Descriptor
Interrupt Queue Pointer
Interrupt Queue Length
Name
Name
RSVD
Interrupt Descriptor
Preliminary Information / Mindspeed Proprietary and Confidential
Value
Value
—
0
0
TOTAL
These 30 bits are appended with 00b to form a dword-aligned 32-bit address. This address points to
the first word of the Interrupt Queue buffer.
Ensures dword alignment.
Reserved.
This 15-bit number specifies the length of the Interrupt Queue buffer in dwords. The maximum size for
an interrupt queue is 32,768 dwords. This is a 0-based number. A value of 1 indicates the queue length
is 2 descriptors long, the required minimum.
Interrupt Queue Pointer
Interrupt Queue Length
Mindspeed Technologies
Field Name
®
Description
Description
dwords
1
1
2
Memory Organization
Octets
4
4
8
101