28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 105

• Manufacturer Part Number: 28478G-18
• Description: Multichannel Synchronous Communications Controller 208-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of 28478G-18

• Package: 208BGA
• Maximum Data Rate: 32768 Kbps
• Transmission Media Type: Wire
• Power Supply Type: Analog
• Typical Supply Current: 250 mA
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V

Table 5-18.
28478-DSH-002-E
Field
11:10
Bit
9
8
7
6
5
4
3
2
MAXSEL[1:0]
MSKSUERR
Channel Configuration Descriptor (2 of 3)
MSKSDEC
MSKSFILT
MSKSINC
MSKMSG
MSKIDLE
MSKEOM
Name
FCS
Preliminary Information / Mindspeed Proprietary and Confidential
Value
0
1
2
3
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Mindspeed Technologies
Message Length—Disable message length check.
Message Length—Use Register 1. Use MAXFRM1 bit field in the message length descriptor
for maximum receive message length limit.
Message Length—Use Register 2. Use MAXFRM2 bit field in the message length descriptor
for maximum receive message length limit.
Reserved
FCS Transfer Normal. For receive, do not transfer received FCS into shared memory along
with data message. For transmit, do transmit calculated FCS out serial port after last bit in
last data buffer has been transmitted.
Non FSC Mode. For receive, transfer received FCS into shared memory along with data
message; do not transmit calculated FCS out of serial port.
In Non-FCS Mode, a SHT message detection is disabled. Any number of bytes can be
transmitted and received within any single message, including message length of only one
byte.
SUERR Interrupt enabled. Receive only. For SS7-HDLC-FCS16 mode, Signal Unit Error Rate
Monitor function generates interrupt when signal unit error count crosses signal unit error
threshold.
SUERR Interrupt disabled.
SINC Interrupt enabled. Receive only. For SS7-HDLC-FCS16 mode, SUERM function
generates interrupt when signal unit error count increments.
SINC Interrupt disabled.
SDEC Interrupt enabled. Receive only. For SS7-HDLC-FCS16 mode, SUERM function
generates interrupt when signal unit error count decrements.
SDEC Interrupt disabled.
SFILT Interrupt enabled. Receive only. For SS7-HDLC-FCS16 mode, interrupt generated
when two consecutive received messages are found to be identical. Second message
discarded.
SFILT Interrupt disabled. For SS7-HDLC-FCS16 mode, interrupt is not generated when two
consecutive received messages are found to be identical. Second message discarded.
CHABT, CHIC, SHT Interrupt enabled. Receive only. When receiver detects change to abort
code, change to idle code, or too-short message, this bit generates interrupt to indicate
condition.
CHABT, CHIC, SHT Interrupt disabled.
LNG, FCS, ALIGN, ABT Interrupt enabled. Receive only. When receiver detects too-long
message, FCS error, message alignment error, or abort condition, this bit generates interrupt
to indicate condition.
In order for MSKMSG=1 to disable all interrupts (LNG, FCS, ALIGN) the MSKEOM must be
set (i.e., 1).
EOM Interrupt enabled. Receive and Transmit. Interrupt generated when end of message
detected.
EOM Interrupt disabled.
®
Description
Memory Organization
92