28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 119

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28478G-18

Manufacturer Part Number
28478G-18
Description
Multichannel Synchronous Communications Controller 208-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet

Specifications of 28478G-18

Package
208BGA
Maximum Data Rate
32768 Kbps
Transmission Media Type
Wire
Power Supply Type
Analog
Typical Supply Current
250 mA
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
Table 5-31.
28478-DSH-002-E
Field
19:16
Bit
15
ERROR[3:0]
Name
ILOST
Field
Interrupt Descriptor (4 of 5)
Value
10
11
12
13
14
15
9
0
1
Preliminary Information / Mindspeed Proprietary and Confidential
Interrupt
ALIGN
SUERR
Name
ABT
LNG
ILOST
FCS
PERR
SHT
(2)
(2)
(2)
(2)
Mindspeed Technologies
— — — — — PCI Bus Parity Error. Generated when MUSYCC detects a parity error
— — — — — No interrupts have been lost.
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V Frame Check Sequence Error. Generated when received HDLC frame is
V Octet Alignment Error. Generated when message payload size, after
V Abort Termination. Generated when received message is terminated
V Long Message. Generated when received message length (after zero
V Short Message. Generated when received message length (after zero
V SS7 Signal Unit Error Rate Interrupt. Generated when in SS7 mode
terminated with octet-aligned 7Eh flag, but computed FCS does not
match received FCS.
zero extraction, is not a multiple of 8 bits. This generally occurs with
an FCS error. This interrupt also implies an FCS error. The FCS
interrupt will not be generated if the ALIGN interrupt is issued.
with an abort sequence—seven sequential 1s—instead of a specific
closing flag – 7Eh.
extraction) is greater than selected maximum message size. Message
reception is terminated and not transferred to shared memory.
extraction) is less than or equal to number of bits in FCS field. The
message data is not transferred to shared memory.
and error monitor, SUERM, value rises past the threshold value, SUET.
on data transferred into MUSYCC either from another PCI agent
writing into MUSYCC, or from MUSYCC reading data from shared
memory. This error is specific to the data phase of a PCI transfer while
MUSYCC is receiving data. Note: PCI system error signal, SERR*, is
ignored by MUSYCC. NOTE: To mask the PERR interrupt, MUSYCC’s
PCI Configuration Space, Function 0, Register 1, Parity Error
Response field must be set to 0.
Interrupt Lost. Generated when internal interrupt queue is full, and
additional interrupt conditions are detected. Because MUSYCC cannot
store the newest interrupt descriptors, it discards the new interrupts
and overwrites this bit in the last interrupt in an internal queue prior to
that interrupt being transferred out to shared memory. The integrity of
the descriptor being overwritten is maintained.
®
Description
(3)
Memory Organization
106

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