28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 153
28478G-18
Manufacturer Part Number
28478G-18
Description
Multichannel Synchronous Communications Controller 208-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.28478G-18.pdf
(195 pages)
Specifications of 28478G-18
Package
208BGA
Maximum Data Rate
32768 Kbps
Transmission Media Type
Wire
Power Supply Type
Analog
Typical Supply Current
250 mA
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
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6.4.8.2.3
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6.4.8.2.4
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6.4.8.2.5
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6.4.8.2.6
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28478-DSH-002-E
DMAC sets bit field EOM = 1 in Receive Buffer Status Descriptor
(if INHRBSD = 0 in Receive Channel Configuration Descriptor).
BLP and DMAC continue with normal message processing.
BLP detected received data changed from pad fill (7Eh) octets to abort code (zero followed by seven
consecutive 1s).
Interrupt Descriptor in Interrupt Queue with EVENT = CHABT, DIR = 0
(if MSKIDLE = 0 in Receive Channel Configuration Descriptor).
BLP and DMAC continue with normal message processing.
BLP detected received data changed from abort code (0 followed by seven 1s) to idle code (7Eh) octets.
Interrupt Descriptor in Interrupt Queue with EVENT = CHIC, DIR = 0
(if MSKIDLE = 0 in Receive Channel Configuration Descriptor).
BLP and DMAC continue with normal message processing.
BLP detected that the serial interface has transitioned from an out-of-frame to in-frame condition.
Interrupt Descriptor in Interrupt Queue with EVENT = FREC, DIR = 0
(if MSKOOF = 0 in Group Configuration Descriptor).
BLP and DMAC continue with normal message processing.
BLP incremented the SUERM counter. The channel is in SS7 mode. The reasons for SUERM counter to
increment include reception of a short message, octet alignment error, FCS mismatch, or an accumulation of
octet count errors. Each of these conditions may also generate an interrupt.
Interrupt Descriptor in Interrupt Queue with EVENT = SINC, DIR = 0
(if MSKSINC = 0 in Receive Channel Configuration Descriptor).
BLP and DMAC continue with normal message processing.
Change to Abort Code (CHABT)
Change to Idle Code (CHIC)
Frame Recovery (FREC)
SS7 SUERM Octet Count Increment (SINC)
Preliminary Information / Mindspeed Proprietary and Confidential
Mindspeed Technologies
®
Basic Operation
140
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