28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 146

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28478G-18

Manufacturer Part Number
28478G-18
Description
Multichannel Synchronous Communications Controller 208-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet

Specifications of 28478G-18

Package
208BGA
Maximum Data Rate
32768 Kbps
Transmission Media Type
Wire
Power Supply Type
Analog
Typical Supply Current
250 mA
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
The POLLTH bit field specifies how often MUSYCC checks the owner bit in a host-owned Buffer Descriptor. The
values correspond to 1-, 16-, 32-, or 64-frame periods, or 125 µs, 2 ms, 4 ms, and 8 ms, respectively. The POLLTH
bit field is always used in conjunction with the SFALIGN bit field.
times.
If the serial port is configured for Nx64 mode (a variable number of 64 kbps channels assigned to form one logical
channel), the Time Slot Counter is reset only when the inputs TSYNC or RSYNC are asserted. In this case, the
SFALIGN bit field is always ignored.
Table 6-11.
6.3.21
MUSYCC provides a mechanism to repeatedly transmit a single message. A transmitter channel enters the repeat
mode if the REPEAT bit field is 1, and the EOM bit field is 1 in a Transmit Buffer Descriptor.
A repeating message either fits entirely in the internal FIFO buffer space allocated for the transmitter channel, or
the message is accessed in pieces over the PCI bus and then re-accessed from the beginning when the end of
buffer is reached. The determination of whether the message fits entirely in the FIFO buffer or not is automatically
performed each time MUSYCC enters repeat mode. MUSYCC compares the BLEN bit field (which specifies the
number of bytes in the message) from the Transmit Buffer Descriptor to [(BUFFLEN + 1) x 2] (which specifies the
number of dwords in the FIFO buffer) from the Channel Configuration Descriptor.
To exit repeat mode after the current message is completely transmitted and before the next repetition (gracefully
or non-destructively), a channel jump service request must be issued. Prior to the jump request, the host must
initialize the channel’s Transmit Head Pointer with a new Message Descriptor.
To exit repeat mode, regardless of the message being processed, a channel activate or a channel deactivate
service request can be issued. Either is considered destructive because the current message transmission is
aborted.
6.4
6.4.1
MUSYCC is configurable to calculate either a 16- or 32-bit Frame Check Sequence (FCS) for HDLC packets
ranging in size from a minimum of 2 octets to a maximum of 16,384 octets. The FCS always applies to the entire
packet length.
28478-DSH-002-E
Name
2 E1
4 E1
T1
E1
Polling Frequency Using a Time Slot Counter Method
NOTE:
Repeat Message Transmission
Protocol Support
Frame Check Sequence
Standard Channelized Input
Preliminary Information / Mindspeed Proprietary and Confidential
The message being repeatedly transmitted be specified completely by a single Message
Descriptor and not by a linked list of descriptors.
Rate (MHz)
1.536
2.048
4.096
8.192
Mindspeed Technologies
Bits Per Frame
1024
192
256
512
Table 6-11
125 µs
125 µs
125 µs
125 µs
0 (x1)
®
Poll Throttle Value (Multiples of Frames)
lists the various polling frequencies and
1 (x16)
2 ms
2 ms
2 ms
2 ms
2 (x32)
4 ms
4 ms
4 ms
4 ms
Basic Operation
3 (x64)
8 ms
8 ms
8 ms
8 ms
133

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