28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 160

• Manufacturer Part Number: 28478G-18
• Description: Multichannel Synchronous Communications Controller 208-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of 28478G-18

• Package: 208BGA
• Maximum Data Rate: 32768 Kbps
• Transmission Media Type: Wire
• Power Supply Type: Analog
• Typical Supply Current: 250 mA
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V

6.4.8.4.8
In the case of a Long Message (LNG) error, the received HDLC message size is determined to be greater than the
maximum allowed message size (per MAXSEL in Channel Configuration Descriptor).
Reason:
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Effects:
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Channel Level Recovery Actions:
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6.4.8.4.9
In the case of a Short Message (SHT), the total received HDLC message size (including FCS) is less than the
number of FCS bits specified for the receive channel. In other words, for a channel configured for 16-bit FCS, a
minimum of an 8-bit payload must be received to avoid a short message error. For this example, three octets must
be received—one octet for payload and two for FCS. Receiving two octets would be considered a short message.
Reasons:
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Effects:
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Channel Level Recovery Actions:
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6.4.8.4.10
In the case of an SS7 SUERR, an error is detected in SS7 mode which caused a counter for SS7 related errors to
equal or exceed the permitted threshold value. The threshold is stored on a per-channel group basis in the bit field
SUET in a Group Configuration Descriptor.
Reasons:
28478-DSH-002-E
Incorrect transmission of HDLC messages from the distant end.
The Interrupt Descriptor in Interrupt Queue is ERROR = LNG, DIR = 0 (if MSKMSG = 0 in Receive Channel
Configuration Descriptor).
DMAC accesses the Next Message Pointer from the current Message Descriptor.
Returns ownership of the current Message Descriptor to the host by writing the Receive Buffer Status
Descriptor with ONR = HOST, ERROR = LNG (if INHRBSD = 0 in Receive Channel Configuration Descriptor).
The BLP scans for the opening flag of the next HDLC message.
Simultaneously, DMAC checks for Message Descriptor ownership before transferring received data to shared
memory.
None required.
Bit errors during transmission.
Incorrect transmission of HDLC messages from the distant end.
The Interrupt Descriptor in Interrupt Queue is ERROR = SHT, DIR = 0 (if MSKIDLE = 0 in Receive Channel
Configuration Descriptor).
Maintains ownership of current Message Descriptor.
The BLP resumes scanning for opening flag of the next HDLC message.
Simultaneously, MUSYCC checks for Message Descriptor ownership before proceeding with bit-level
operations.
None required.
Long Message (LNG)
Short Message (SHT)
SS7 Signal Unit Error Rate (SUERR) Interrupt
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