28478G-18 Mindspeed Technologies, 28478G-18 Datasheet - Page 44
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28478G-18
Manufacturer Part Number
28478G-18
Description
Multichannel Synchronous Communications Controller 208-Pin BGA
Manufacturer
Mindspeed Technologies
Datasheet
1.28478G-18.pdf
(195 pages)
Specifications of 28478G-18
Package
208BGA
Maximum Data Rate
32768 Kbps
Transmission Media Type
Wire
Power Supply Type
Analog
Typical Supply Current
250 mA
Typical Operating Supply Voltage
3.3 V
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
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The value of the signal lines AD[7:2] during the address phase of configuration cycles selects the register of the
configuration space to access. Valid values are 0–15. Accessing registers outside this range results in an all 0s’
value being returned on reads, and no action being taken on writes.
The value of the signal lines AD[1:0] must be 00b for MUSYCC to respond. If these bits are 0 and the IDSEL signal
line is asserted, then MUSYCC will respond to the configuration cycle.
Although there are two separate configuration spaces, one for Function 0 and one for Function 1, some internal
registers are shared between the two spaces.
The Base Code register contains the Class Code, Sub Class Code, and Register Level Programming Interface
registers.
Table 2-1.
Table 2-2.
28478-DSH-002-E
FOOTNOTE:
(1)
FOOTNOTE:
(1)
Registers shared between Function 0 and 1.
Registers shared between Function 0 and 1.
Tables 2-1
Register
Register
Number
Number
—
14
15
—
14
15
0
1
2
3
4
5
0
1
2
3
4
5
Function 0 Configuration Space
Function 1 Configuration Space
and
2-2
Byte Offset
Byte Offset
Preliminary Information / Mindspeed Proprietary and Confidential
(Hex)
(Hex)
list Function 0 and Function 1 configuration spaces.
0Ch
3Ch
0Ch
3Ch
00h
04h
08h
10h
14h
38h
00h
04h
08h
10h
14h
38h
—
—
Mindspeed Technologies
31
31
Max Latency
Reserved
Reserved
24
24
Device ID
Device ID
Reserved
Status
Status
(1)
(1)
MUSYCC Base Address Register (BAR)
Header Type
Header Type
EBUS Base Address Register (BAR)
Base Code
Base Code
Min Grant
16
16
®
Reserved
Reserved
—
—
—
—
LatencyTimer
Interrupt Pin
Interrupt Pin
Reserved
8
8
Vendor ID
Vendor ID
Command
Command
Host Interface
(1)
(1)
Revision ID
Revision ID
Interrupt Line
Interrupt Line
Reserved
Reserved
0
0
(1)
(1)
31
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