PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 125

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

INCA-D
PSB 21473
Parallel Ports
In open drain mode the upper transistor is always switched off, and the output driver can
only actively drive the line to a low level. When writing a ‘1’ to the port latch, the lower
transistor is switched off and the output enters a high-impedance state. The high level
can then be provided by using an internal pull up transisitor or by an external pull up
device. With this feature, it is possible to connect several port pins together to a Wired-
AND configuration, saving external glue logic and/or additional software overhead for
enabling/disabling output signals.
This last feature is controlled through the respective Open Drain Control Registers
ODPx. These registers allow the individual bit-wise selection of the open drain mode for
each port line. If the respective control bit ODPx.y is ‘0’ (default after reset), the output
driver is in the push/pull mode. If ODPx.y is ‘1’, the open drain configuration is selected.
Note that all ODPx registers are located in the ESFR space.
The output driver is disabled in power down mode unless PxPHEN.y = ’1’.
Alternate Port Functions
Beside the use as general purpose I/Os, each port line has one or more programmable
alternate input or output function associated.
Whether a port pin should operate as general purpose I/O or as alternate function, is
determined by setting the corresonding bit in the PxALTSEL0 register, if the alternate
function is not controlled by the corresponding peripheral itself.
If a port pin has a second alternate function which has to be selected per software, the
bit of the PxALTSEL1 register has to be set accordingly.
Note: If two or more alternate functions are enabled concurrently, the behaviour is not
predictable, but the device won’t be damaged.
On most of the port lines, the user software is responsible for setting the proper direction
when using an alternate input or output function of a pin. This is done by setting or
clearing the direction control bit DPx.y of the pin before enabling the alternate function.
There are port lines, however, where the direction of the port line is switched
automatically. For instance, in the multiplexed external bus modes of PORT0, the
direction must be switched several times for an instruction fetch in order to output the
addresses and to input the data. Obviously, this cannot be done through instructions. In
these cases, the direction of the port line is switched automatically by hardware if the
alternate function of such a pin is enabled.
Note: In this case, make sure DP0 ’ ’0’..
All port lines that are not used for these alternate functions may be used as general
purpose I/O lines. When using port pins for general purpose output, the initial output
value should be written to the port latch prior to enabling the output drivers, in order to
avoid undesired transitions on the output pins. This applies to single pins as well as to
pin groups (see examples below).
Data Sheet
125
2003-03-31