PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 239

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PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
2-sum of the 7 data bits is ‘1’. An odd parity bit will be cleared in this case. Parity checking
is enabled via bit CON_PEN (always OFF in 8-bit data mode). The parity error flag
CON_PE will be set along with the error interrupt request flag, if a wrong parity bit is re-
ceived. The parity bit itself will be stored in bit RBUF.7.
Figure 15-4 Asynchronous 8-Bit Frames
9-Bit Data Frames
9-bit data frames either consist of 9 data bits D8...D0 (S0CON_M=’100
D7...D0 plus an automatically generated parity bit (S0CON_M=’111
D7...D0 plus wake-up bit (CON_M=’101
CON_ODD. An even parity bit will be set, if the modulo-2-sum of the 8 data bits is ‘1’. An
odd parity bit will be cleared in this case. Parity checking is enabled via bit CON_PEN
(always OFF in 9-bit data and wake-up mode). The parity error flag CON_PE will be set
along with the error interrupt request flag, if a wrong parity bit is received. The parity bit
itself will be stored in bit RBUF.8.
Data Sheet
S0CON_M=001
S0CON_M=0
Start
Start
Bit
Bit
0
0
LSB
LSB
D0
D0
D1
D1
D2
D2
The Asynchronous / Synchr. Serial Interface
B
’). Parity may be odd or even, depending on bit
7 Data Bits
239
10-/11-Bit UART Frame
10-/11-Bit UART Frame
D3
D3
8 Data Bits
D4
D4
D5
D5
MSB
D6
D6
MSB
Parity
D7
Bit
B
’) or of 8 data bits
Stop
(1st)
(1st)
Stop
Bit
B
Bit
1
1
’), of 8 data bits
PSB 21473
(2nd)
Stop
(2nd)
Stop
Bit
Bit
1
1
2003-03-31
INCA-D

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