PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 173

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

This allows to use memory components or peripherals with different interfaces within the
same system, while optimizing accesses to each of them.
SYSCON (FF12
Bit
VISIBLE
XPEN
CSCFG
WRCFG
CLKEN
BYTDIS
SGTDIS
STKSZ
1)
Note: Register SYSCON cannot be changed after execution of the EINIT instruction.
Note: Only exception: bit VISIBLE can also be changed by the on-chip debug support
Data Sheet
15
The implemented pad type for CLKOUT supports only an open-drain output driver
STKSZ
with DPEC access.
14
rw
13
H
Function
Visible Mode Control
0:
1:
XBUS Peripheral Enable Bit
0:
1:
Chip Select Configuration Control
0:
1:
Write Configuration Control (Set according to pin P0H.0 during reset)
0:
1:
System Clock Output Enable (CLKOUT
0:
1:
Disable/Enable Control for Pin BHE (Set according to data bus width)
0:
1:
Segmentation Disable/Enable Control
‘0’: Segmentation enabled (CSP is saved/restored during interrupt entry/exit)
‘1’: Segmentation disabled (Only IP is saved/restored)
System Stack Size
Selects the size of the system stack (in the internal RAM) from 32 to 1024 words
/ 89
12
0
r
Accesses to XBUS peripherals are done internally
XBUS peripheral accesses are made visible on the external pins
Accesses to the on-chip X-Peripherals and their functions are disabled
The on-chip X-Peripherals are enabled and can be accessed
Latched CS mode. The CS signals are latched internally
and driven to the (enabled) port pins synchronously.
Unlatched CS mode. The CS signals are directly derived from the address
and driven to the (enabled) port pins.
Pins WR and BHE retain their normal function
Pin WR acts as WRL, pin BHE acts as WRH
CLKOUT disabled
CLKOUT enabled;
Pin BHE enabled
Pin BHE disabled, pin may be used for general purpose I/O
H
)
SGT
DIS
11
rw
10
0
r
BYT
DIS
rw
9
CLK
EN
rw
8
SFR-b
173
CFG
WR
rw
7
1)
)
CFG
CS
rw
6
5
0
r
The External Bus Interface
0
4
r
Reset Value: EA84
3
0
r
XPEN
rw
2
PSB 21473
BLE
VISI
rw
2003-03-31
1
INCA-D
0
0
r
H