PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 185

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PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
To get a rounded integer result, 18432/2 is added to numerator. So the software uses
actually the following equation:
The remainder of the division will be stored. The absolute error (in T6 units) introduced
by this division is:
To calculate the error with higher resolution and to get a rounded result, the numerator
is shifted left 10 bits, and FDV/2 is added. So the software uses actually the following
equation:
The software searches for the combination of FDV and BG that produces the minimum
error. FDV is modified only from 256 to 512, because values 1 to 255 would not produce
better results. If the optimum FDV value is 512, it will be changed to 0 according to the
ASC description.
• Then the serial port is initialized in the following way:
• 8 data bits, one stop bit, no parity bit,
• fractional divider and baud rate generator enabled,
• calculated values for S0FDV and S0BG,
• TXD output set to 1 and enabled.
An identification byte D5
Note: The range of timer T6 (max. 65535 increments) determines the lowest possible
Note: At very high baud rates, the accuracy is limited by the restrictions for frequency
13.2
At the next step, the ASC bootstrap loader goes into a loop expecting 32 bytes to be
received. This loop does not have an exit on time-out condition, so the program will wait
forever unless 32 bytes are received. The received bytes are stored sequentially in the
internal RAM beginning at address 00’FA40
After the reception of the 32 bytes, the ASC bootstrap loader automatically performs a
jump to location 00’FA40
point, the program is no longer defined by the ROM code.
Data Sheet
baud rate: BR > (9 * f
division via S0FDV and S0BG. Additionally, the quantization error of timer T6 and
signal distortion effects (e.g., different on/off delays) must be taken into account.
= |18432 * BG + Remainder + 9216) / FDV - 18432 * (BG + 1) / FDV|
BG = (T6 * FDV - 9216) / 18432
Error
Error= ((|Remainder - 9216| << 10) + (FDV >>1))/ FDV
Loading the Startup Code
0
= |T6 - T6(due to BG calculation)|
H
H
is sent back to the host via pin TXD (P3.10).
, and the loaded program will be executed. Starting at this
CPU
= |Remainder - 9216| / FDV
) / (4* 65535)
185
H
and ending at address 00’FA5F
The Bootstrap Loader
PSB 21473
2003-03-31
H
.
INCA-D
(4)
(5)
(6)

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