PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 253

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

15.1.8
To improve the safety of serial data exchange, the serial channel ASC provides an error
interrupt request flag, which indicates the presence of an error, and three (selectable)
error status flags in register S0CON, which indicate which error has been detected
during reception. Upon completion of a reception, the error interrupt request line S0EIR
will be activated simultaneously with the receive interrupt request line S0RIR, if one or
more of the following conditions are met :
15.1.9
There are four different interrupts associated with the serial channel ASC. S0TIR
indicates a transmit interrupt, S0TBIR indicates a transmit buffer interrupt, S0IR
indicates a receive interrupt and S0EIR indicates an error interrupt of the serial channel.
The cause of an error interrupt request (framing, parity, overrun error) can be identified
by the error status flags FE, PE, and OE which are located in the control register S0CON.
For normal operation (ie. besides the error interrupt) the ASC provides three interrupt
requests to control data exchange via the serial channel:
• S0TBIR is activated when data is moved from S0TBUF to the transmit register
• S0TIR is activated before the last bit of an async. frame is transmitted, or after the last
• S0RIR is activated when the received frame is moved to S0RBUF.
S0TBIR and S0RIR are connected to dedicated interrupt nodes of the CPU, whereas
SEIR and STIR are part of the combined interrupt node COMB2INT (refer to "Interrupt
System Structure" on page 8-85).
The transmitter is serviced by two interrupt handlers. This provides advantages for the
servicing software.
For single transfers it is sufficient to use the transmitter interrupt (S0TIR), which indicates
that the previously loadad data has been transmitted, except for the last bit of an
asynchronous frame.)
Data Sheet
– the framing error detection enable bit S0CON_FEN is set and any of the expected stop bits is
– If the parity error detection enable bit S0CON_PEN is set in the modes where a parity bit is
– If the overrun error detection enable bit S0CON_OEN is set and the last character received
bit of a synchronous frame has been transmitted
not high, the framing error flag S0CON_FE is set, indicating that the error interrupt request is
due to a framing error (Asynchronous mode only).
received, and the parity check on the received data bits proves false, the parity error flag
S0CON_PE is set, indicating that the error interrupt request is due to a parity error
(Asynchronous mode only).
was not read out of the receive buffer by software or DMA transfer at the time the reception
of a new frame is complete, the overrun error flag S0CON_OE is set indicating that the error
interrupt request is due to an overrun error (Asynchronous and synchronous mode).
Hardware Error Detection Capabilities
Interrupts
The Asynchronous / Synchr. Serial Interface
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PSB 21473
2003-03-31
INCA-D