PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 600

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Data Sheet
Note: When the Bootstrap Loader Mode was activated during a hardware reset the
The first instruction is fetched from external memory. To decrease the number of
instructions required to initialize the INCA-D, each peripheral is programmed to a default
configuration upon reset, but is disabled from operation. These default configurations
can be found in the descriptions of the individual peripherals.
During the software design phase, portions of the internal memory space must be
assigned to register banks and system stack. When initializating the stack pointer (SP)
and the context pointer (CP), it must be ensured that these registers are initialized before
any GPR or stack operation is performed. This includes interrupt processing, which is
disabled upon completion of the internal reset, and should remain disabled until the SP
is initialized.
Note: Traps may occur, even though the interrupt system is still disabled.
In addition, the stack overflow (STKOV) and the stack underflow (STKUN) registers
should be initialized. After reset, the CP, SP, and STKUN registers all contain the same
reset value 00’FC00
reset initialization, 256 words of system stack are available, where the system stack
selected by the SP grows downwards from 00’FBFE
by the CP grows upwards from 00’FC00
Based on the application, the user may wish to initialize portions of the internal memory
before normal program operation. Once the register bank has been selected by
programming the CP register, the desired portions of the internal memory can easily be
initialized via indirect addressing.
At the end of the initialization, the interrupt system may be globally enabled by setting bit
IEN in register PSW. Care must be taken not to enable the interrupt system before the
initialization is complete.
The software initialization routine should be terminated with the EINIT instruction. This
instruction has been implemented as a protected instruction. Execution of the EINIT
instruction disables the action of the DISWDT instruction, disables write accesses to
register SYSCON (see note) and causes the RSTOUT pin to go high. This signal can be
used to indicate the end of the initialization routine and the proper operation of the
microcontroller to external hardware.
Note: All configurations regarding register SYSCON (enable CLKOUT, stacksize, etc.)
24.8
Although most of the programmable features of the INCA-D are either selected during
the initialization phase or repeatedly during program execution, there are some features
INCA-D does not fetch instructions from location 00’0000
via serial interface ASC.
must be selected before the execution of EINIT.
System Startup Configuration
H
, while the STKOV register contains 00’FA00
H
.
600
H
, while the register bank selected
H
but rather expects data
H
. With the default
System Reset
PSB 21473
2003-03-31
INCA-D