PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 288

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Data Sheet
17.1.7
To communicate with the DSP a set of four 8 bit timeslot register inside the IOM-2
handler have implicitely to be used, whereas two of them belong to DSP channel 1 and
two of them belong to DSP channel 2.
The data from IOM, which should be carried on one of these registers is defined by the
’codec time slot and data port selection registers’ CO_TSDPx as described in table 17-2.
Table 17-2
If DSP channel 1 issues 8 bit data, the corresponding time slot on IOM will be defined by
CO_TSDP10. (DSP channel 2 accordingly)
If the DSP writes 16 bit data to its channel 1, the high byte is controlled by CO_TSDP11
and the low-byte is controlled by CO_TSDP10. (DSP channel 2 accordingly)
Note: Because after reset CO_DSP10 refers to the B1-IOM slot and CO_DSP11 refers
Particulary for DSP channel 2 pls. note the following:
Without "Channel Split"
CO_TSDP20 = channel 2, 8 bit
CO_TSDP20 + CO_TSDP21 = channel 2, 16 bit
With "Channel Split"
CO_TSDP20 = channel 3
CO_TSDP21 = channel 2
Codec Selection Register
to B2, you'll find a 16 bit value without register change as (B1=low-byte | B2=high-
byte) on IOM.
CO_TSDP10
CO_TSDP11
CO_TSDP20
CO_TSDP21
Communication between DSP and IOM-2
Mapping of DSP channels to ’codec selection register’
IOM-2 Handler, TIC/CI Handler and HDLC Controller
DSP channel
288
1
1
2
2
16 bit Data Width
High Byte
High Byte
Low Byte
Low Byte
PSB 21473
2003-03-31
INCA-D