PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 589

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Each clock control register consists of three bits. Two of these bits determine if the clock
is disabled. The other bit indicates whether the peripheral clock is disabled or not.
According to the peripherla, the base address refers to the PD-bus address space or the
XBUS address space.
mod CLC (MODBASE+00
Bit
mod DISR
mod DISS
mod SPEN
The functions of the bits of the clock control register are illustrated in figure 23-2. Note
that the input line called ocds_p_suspend comes from the OCDS and is 1 if a break is
active. Thus, with bit mod SPEN, it can be selected whether the peripheral mod gets
stopped on a break or not.
Figure 23-2 Peripherals´ Clock Control Block
Data Sheet
15
ocds_p_suspend
14
reserved
13
Function
Module Disable Request Bit
mod DISR = ‘0’: Module disable not requested
mod DISR = ‘1’: Module disable requested
Module Disable Status Bit
mod DISS = ‘0’: Module enabled
mod DISS = ‘1’: Module disabled
Module Suspend Enable Bit for OCDS
mod SPEN = ‘0’: Module suspend disabled
mod SPEN = ‘1’: Module suspend enabled
12
11
H
)
SPEN
mod
10
reserved
DISS
mod
9
Reset Value: 0000
DISR
mod
8
589
7
0
6
0
H
FSOE
mod
5
SBWE
mod
Power Reduction Modes
4
EDIS
mod
3
read/write
finished ?
SPEN
mod
rw
2
PSB 21473
DISS
mod
2003-03-31
1
r
INCA-D
DISR
mod
rw
0