PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 54

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

Data Sheet
PSW (FF10
Bit
N
C
V
Z
E
MULIP
ILVL, IEN
•
ALU Status (N, C, V, Z, E, MULIP)
The condition flags (N, C, V, Z, E) within the PSW indicate the ALU status due to the last
recently performed ALU operation. They are set by most of the instructions due to
specific rules, which depend on the ALU or data movement operation performed by an
instruction.
After execution of an instruction which explicitly updates the PSW register, the condition
flags cannot be interpreted as described in the following, because any explicit write to
the PSW register supersedes the condition flag values, which are implicitly generated by
the CPU. Explicitly reading the PSW register supplies a read value which represents the
state of the PSW register after execution of the immediately preceding instruction.
Note: After reset, all of the ALU status bits are cleared.
• N-Flag: For most of the ALU operations, the N-flag is set to '1', if the most significant
bit of the result contains a '1', otherwise it is cleared. In the case of integer operations the
N-flag can be interpreted as the sign bit of the result (negative: N=’1’, positive: N=’0’).
Negative numbers are always represented as the 2's complement of the corresponding
15
14
ILVL
rw
H
13
/ 88
Function
Negative Result
Set, when the result of an ALU operation is negative.
Carry Flag
Set, when the result of an ALU operation produces a carry bit.
Overflow Result
Set, when the result of an ALU operation produces an overflow.
Zero Flag
Set, when the result of an ALU operation is zero.
End of Table Flag
Set, when the source operand of an instruction is 8000
Multiplication/Division In Progress
‘0’: There is no multiplication/division in progress.
‘1’: A multiplication/division has been interrupted.
Interrupt and EBC Control Fields
Define the response to interrupt requests and enable external bus arbitration.
(Described in section “Interrupt and Trap Functions”)
H
)
12
IEN
11
rw
0
10
r
0
9
r
0
8
r
54
SFR
0
7
r
6
r
0
MUL
5
rw
IP
4
rw
E
Central Processor Unit
H
Reset Value: 0000
or 80
3
rw
Z
H
2
rw
.
V
PSB 21473
1
rw
2003-03-31
C
INCA-D
0
rw
H
N