PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 62

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PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
Data Sheet
CP (FE10
Bit
cp
Note: It is the user's responsibility that the physical GPR address specified via CP
The CP register can be updated via any instruction which is capable of modifying an
SFR.
Note: Due to the internal instruction pipeline, a new CP value is not yet usable for GPR
The Switch Context instruction (SCXT) allows to save the content of register CP on the
stack and updating it with a new value in just one machine cycle.
15
r
1
14
r
register plus short GPR address must always be an internal RAM location. If this
condition is not met, unexpected results may occur.
• Do not set CP below the IRAM start address, ie. 00’F600
• Do not set CP above 00’FDFE
• Be careful using the upper GPRs with CP above 00’FDE0
address calculations of the instruction immediately following the instruction
updating the CP register.
1
H
/ 08
13
r
1
H
)
Function
Modifiable portion of register CP
Specifies the (word) base address of the current register bank.
When writing a value to register CP with bits CP.11...CP.9 = ‘000’, bits
CP.11...CP.10 are set to ‘11’ by hardware, in all other cases all bits of bit field
“cp” receive the written value.
12
r
1
11
10
9
H
8
SFR
62
7
6
rw
cp
5
4
Central Processor Unit
H
3
H
Reset Value: FC00
2
PSB 21473
1
2003-03-31
INCA-D
0
r
0
H

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