PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 525

• Manufacturer Part Number: PSB21473FV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21473FV13XT

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Lead Free Status / RoHS Status: Compliant

INCA-D
PSB 21473
USB Module
The standard USB read access as shown in figure 22-10 supports random and
sequential CPU access mode of the USB memory. The memory buffer full condition is
true when a predefined number of bytes (MaxLen) has been written by the CPU or when
bit DONE has been set by software.
After SOF(n) occured at
with a full USB memory buffer, the USB reads the buffer. Bit
1
SOD is set at the end of the USB buffer read operation at
, indicating an empty USB
2
memory buffer. Now, the CPU can write again data into the USB memory buffer until a
determined number (MaxLen) of bytes are transfered or until bit DONE has been set by
software. The MaxLen value must be previously set by software. When the actual USB
memory buffer address offset is equal to MaxLen, bit EOD is set at
to indicate a full
3
buffer. The USB memory buffer address offset is automatically incremented with every
CPU write access to USB memory buffer if bit INCE is set.
During the next frame (after SOF(n+1)) is set at
) the USB memory buffer can be read
4
by the USB. Bit SOD is set again when the USB memory buffer becomes empty again.
If bit DONE is set by the CPU (at
), the buffer is declared by the CPU to be full, even
5
if the address offset does not reach the value of MaxLen.
Number of
Data Bytes
EOD
in USB Buffer
set
MaxLen
3
DONE
2
set
SOD
SOD
5
set
set
1
4
Time
Frame n
Frame n+1
SOF (n)
SOF (n+1)
SOF (n+2)
set
set
set
USB read accesses
CPU write accesses
MCT03403
Figure 22-10 Single Buffer Mode : Standard USB Read Access
Data Sheet
525
2003-03-31