PSB21473FV13XT Infineon Technologies, PSB21473FV13XT Datasheet - Page 311

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PSB21473FV13XT

Manufacturer Part Number
PSB21473FV13XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21473FV13XT

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Lead Free Status / RoHS Status
Compliant
All incoming data bytes are stored in the RFIFO. If the FIFO is full an RFO interrupt is
asserted (EXMR.SRA = ’0’).
Note: In the extended transparent mode the EXMR register has to be set to ’xxx00000’
17.4
All interrupt sources from the ISTAH register are combined (ORed) to a single HDLC
controller interrupt signal hint. Each of the interrupt sources can individually be masked
in the MASKH register. A masked interrupt is not indicated in the ISTAH register but
remains internally stored and pending until the interrupt is unmasked and read by the
host.
The HDLC controller interrupts XDU and XMR have special impact on the internal
functions. E.g. the transmitter of the HDLC controller is locked if a data underrun
condition occurs and the ISTAH.XDU is not read (the interrupt can only be read if
unmasked), same applies for XMR.
Figure 17-24 Interrupt Status Registers of the HDLC Controller
Data Sheet
HDLC Controller Interrupts
Interrupt
IOM-2 Handler, TIC/CI Handler and HDLC Controller
311
MASKH
RME
XMR
RFO
XDU
XPR
RPF
ISTAH
RFO
RME
RPF
XPR
XMR
XDU
PSB 21473
2003-03-31
INCA-D

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