LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 125

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

in a value for Term 1 in Equation 1 of 111.70 (~112) for a 4400 RPM.
desired functionality.
Note: All calculations of Count were based on tachometer inputs with two pulses per revolution and on the clock
source input divided down by two (default settings).
The divisor for each fan is programmable via the Fan Control Register, Logical Device A, runtime register 0x58. The
choices for the divisor are 1, 2, 4 and 8. The default value is 2.
7.16 SECURITY FEATURE
The following register describes the functionality to support security in the LPC47M192.
7.16.1 GPIO DEVICE DISABLE REGISTER CONTROL
The GPIO pin GP43 is used for the Device Disable Register Control (DDRC) function. Setting bits[3:2] of the GP43
configuration register to ‘01’, selects the DDRC function for the GP43 pin. When bits[3:2]=01 the GP43 pin is an
input, with non-inverted polarity. Bits[3:2] cannot be cleared by writing to these bits; they are cleared by VTR POR,
VCC POR and PCI Reset. That is, when the DDRC function is selected for this pin, it cannot be changed, except by a
VCC POR, PCI reset or VTR POR.
When the DDRC function is selected for GP43, the Device Disable register is controlled by the value of the GP43 pin
as follows:
7.16.2 DEVICE DISABLE REGISTER
The Device Disable Register is located in the PME register block at offset 0x22 from the PME_BLK base I/O address
in logical device A. Writes to this register are blocked when the GP43 pin is configured for the Device Disable
Register Control function (GP43 configuration register bit 2 =1) and the GP43 pin is high.
The configuration register for the device disable register is defined in the “Runtime Registers” section.
7.17 GAME PORT LOGIC
The LPC47M192 implements logic to support a dual game port. This logic includes the following for each game port:
two 555 timers, two game port RC constant inputs (x-axis and y-axis), two game port button inputs and game port
interface logic. The implementation of the Game Port uses a simple A/D converter constructed from a 555 timer to
digitize the analog value of a potentiometer for the x-axis and y-axis of the joystick.
SMSC DS – LPC47M192
If the GP43 pin is high, the Device Disable Register is Read-Only.
If the GP43 pin is low, the Device Disable Register is Read/Write.
Mode Select
Divide by 1
Divide by 2
Divide by 4
Divide by 8
RPM
4400
3080
2640
2204
Revolution
Time per
13.64 ms
19.48 ms
22.73 ms
27.22 ms
Nominal
RPM
8800
4400
2200
1100
Term 1 for “Divide by 2”
Revolution
(Default) in Decimal
Time per
13.64 ms
27.27 ms
54.54 ms
6.82 ms
112 counts
160 counts
186 counts
223 counts
DATASHEET
Preload
32
32
32
32
Page 125
Given Speed in
Preload
Counts for the
32
32
32
32
Decimal
144
144
144
144
The following tables show examples of the
(Term 1) + Preload
(maximum count)
Count =
70% RPM
144
192
218
255
6160
3080
1540
770
Revolution for
70% RPM
Typical RPM
Time per
19.48 ms
38.96 ms
77.92 ms
Comments
9.74 ms
70% RPM
60% RPM
50% RPM
Rev. 03/30/05