LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 189

• Manufacturer Part Number: LPC47M192-NW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M192-NW

• Lead Free Status / RoHS Status: Compliant

Note: Reserved bits are Read-Only and return ‘0’ when read. Reserved1 bits are Read-Only and return a ‘1’ when
read.
SMSC DS – LPC47M192
NAME/DEFAULT
Test Digital Value
Register
Default = 0x00
on HVCC POR
and Initialization
Special Function
Register
Default = 0x00
on HVCC POR
and Initialization
REGISTER
OFFSET
(R/W)
(R/W)
(hex)
4C
4F
DATASHEET
This register is used for the digital test mode test.
Bit[0] Low-Power Mode Select
0= Sleep Mode (default)
1= Shutdown Mode
Bit[1] Monitoring Mode Select
0= Continuous Monitor Mode (default)
1= Cycle Monitor Mode
Bit[2] THERM# Enable
0=A0/RESET function as selected by bit 7 of VID register (default)
1=Enables THERM# pin output function
Bit[3] THERM# Voltage Enable
0=Out-of-limit/equal-limit voltages do not affect the state of the
THERM# pin (default)
1=Enable out-of-limit/equal-limit voltages to make the THERM#
pin active low
Bit [4]
0= offset register configured to the external temperature
channels. (Default)
1= offset register configured to the internal temperature
channel.
Bit[5] Number of measurements of each temperature and voltage
reading made.
0= take 128 separate measurements of the data from the analog
block for both remote diode temperature readings before
averaging the result and storing it in the value register for remote
diode temperature measurements; take 8 separate measurements
of all other voltage and internal temperature readings before
averaging. (Default)
1 =use 16 averaging for both remote diode temperature readings
and no averaging for all other voltage and internal temperature
values. Setting this bit to ‘1’ would be used for power saving.
Bits[7:6] Reserved
Offset Register Configure
Page 189
DESCRIPTION
Rev. 03/30/05